Microsemi IGLOO2 - Programming Interface

Board Design Guidelines for SmartFusion2 SoC and IGLOO2 FPGAs
AC393 Application Note Revision 14.0 5
Figure 1 • Power Supplies
Note: The power supply settings for all the PLLs (MDDR, FDDR, and CCC) must be the same in Libero SoC
and on the board. The PLLs (MDDR, FDDR, CCC) can be connected to a 2.5 V or 3.3 V supply.
For M2S090T(S), M2GL090T(S), M2S150T(S), and M2GL150T(S) devices, the VPP and VPPNVM must
be connected to a +3.3 V supply.
For the CCC_xyz_PLL supplies, xy refers to the location of the PLL in the device (NE/ NW/ SW) and z
refers to the number associated with the PLL (0 or 1).
The PLL RC values shown in the figure are applicable to all variants of SmartFusion2/IGLOO2 devices.
For the device to operate successfully, power supplies must be free from unregulated spikes and the
associated grounds must be free from noise. All overshoots and undershoots must be within the absolute
maximum ratings provided in the DS0128: IGLOO2 and SmartFusion2 Datasheet.
The various power supplies needed for IGLOO2 and SmartFusion2 FPGAs are as follows:
• VDD and VPP: The main power supplies for the device. These must be connected to the appropriate
power rail based on the system requirements.
• VDDIx: I/O bank supplies for the device. For recommendations for unused I/O bank supplies, see
Table 6, page 15 and Ta ble 9, page 17.
SmartFusion2/IGLOO2
SERDES_x_L01_VDDAIO
VPPNVM*
VSSNVM
VDD
VSS
VREFx
VDDIx
VDDI (MSIOD & DDRIO)
VPP*
2.5 / 3.3 V
VDDI (MSIO & JTAG)
Charge Pump
eNVM Supply
Core Supply
MDDR/FDDR
SERDES_x_L23_VDDAIO
1.2 V
1 kΩ, 1%
SERDES_x_L23_VDDAPLL
SERDES_x_L23_REFRET
3.3 Ω
0.1 µF 33 µF
SERDES_x_L23_REXT
SERDES_x_L01_VDDAPLL
SERDES_x_L01_REFRET
3.3 Ω
0.1 µF
33 µF
2.5 V
SerDes PLL Analog Supply
SERDES_x_L01_REXT
I/O Bank Supply
1.2 / 1.5 / 1.8 / 2.5 / 3.3 V
1.2 / 1.5 / 1.8 / 2.5 V
2.5 / 3.3 V
0. 1 µF 22 µF
2.5 / 3. 3 V
50 Ω
Aux. PLL PCIe Supply
CCC_xyz_PLL_VSSA
CCC_xyz_PLL_VDDA
0.1 µF
22 µF
1 Ω
2.5 /3.3 V
PLL Analog
Supply
1 Ω
0.1 µF 22 µF
2.5 / 3 .3 V
DDR PLL
Supply
SERDES_x_PLL_VDDA
SERDES_x_PLL_VSSA
MSS/HPMS_xDDR_PLL_VDDA
MSS/HPMS_xDDR_PLL_VSSA
SERDES_x_VDD
Tx/Rx Analog I/O Supply
VDD
1 kΩ, 1%
1.2 kΩ, 1%
1.2 kΩ, 1%
2.5 V
1.2 V