APPENDICES
APP − 63
MELSEC-A
Table 2.3 Instruction Processing Time of Small Size, Compact CPUs (Continue)
Processing Time (µs)
AnS A1SJH/A1SH A2SH (S1)
Direct Mode
Instruction Condition
Refresh
Mode
Other than
X, Y
X, Y
Refresh
Mode
Direct
Mode
Refresh
Mode
Direct
Mode
SLT
Only
device
memory
8448 8448 8448 1088.5 1561.5 878.7 1381.3
SLT
Device
memory
+ R
24598 24598 24598 3314.5 3787.5 2480.7 3035.3
SLTR 29 29 29 7.6 7.7 5.8 5.8
STRA 30 30 30 7.5 7.5 5.7 5.6
STRAR 28 28 28 7.1 7.2 5.4 5.4
STC 28 28 28 7.1 7.2 5.4 5.4
CLC 31 31 31 7.4 7.5 5.7 5.6
DUTY 68 68 68 17.3 17.4 13.1 13.0
PR 226 226 226 68.7 70.4 52.5 54.4
PRC 141 141 141 41.9 41.9 31.5 31.4
CHK
Bit reverse
output instruction
121 121 121 30.7 — 23.2 —
LED 203 203 203 — — — —
LEDC 265 265 265 — — — —
LEDA 202 202 202 — — — —
LEDB 211 211 211 — — — —
LEDR
283 283 638 75.9 75.9 56.9 57.0
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