Mitsubishi MELSEC-A series - Page 469

APPENDICES
APP − 64
MELSEC-A
Table 2.3 Instruction Processing Time of Small Size, Compact CPUs (Continue)
Processing Time (µs)
A2AS (S1)
A2USH-S1
A2USH
board
A2C A52G A0J2H A1FX
Direct Mode
Instruction Condition
Refresh
Mode
Refresh
Mode
Refresh
Mode
Refresh
Mode
Refresh
Mode
Other
than X, Y
X, Y
Refresh
Mode
SLT
Only
device
memory
2915 1324.9 10560 8448 10560 10560 10560 878.7
SLT
Device
memory
+ R
9996 4543.2 30747 24598 30747 30747 30747 2480.7
SLTR 6.6 3.0 37 29 37 37 37 5.8
STRA 5.0 2.27 38 30 38 38 38 5.7
STRAR 5.0 2.27 35 28 35 35 35 5.4
STC 2.4 1.09 35 28 35 35 35 5.4
CLC 2.4 1.09 38 31 38 38 38 5.7
DUTY 14 6.36 85 66 85 85 85 13.1
PR 74 27.19 282 226 282 282 282 52.5
PRC 37 14.64 162 141 176 176 176 31.5
CHK
Bit reverse
output instruction
— 15.0 151 121 151 151 151 23.2
LED 100 — — — — — 253 —
LEDC 142 — — — — — 331 —
LEDA — — — — — — 252 —
LEDB — — — — — — 263 —
LEDR 106 48.2 228 638 797 797 797 56.9