3 - 59                                                                                    3 - 59 
MELSEC-Q
3   SPECIFICATIONS 
 
3.4.12 Input signal error detection extended/input signal error detection/warning output 
settings (buffer memory address 47: Un\G47) 
(1)      This area is used to set whether the input signal error detection, process alarm, 
or rate alarm will be enabled or disabled for each channel. 
If the warning of input signal error detection is enabled, the input signal error 
detection can be performed by setting the same value of upper and lower limit or 
different value of upper and lower limit. 
 
(2)      To make the input signal error detection extended/input signal error 
detection/warning output settings valid, the operating condition setting request 
(Y9) must be turned ON/OFF. (Refer to Section 3.3.2.)
 
 
(3)      All channels for the input signal error detection and alarm settings set to disable, 
and all channels for the input signal error detection extended setting are set to 
Same upper limit value/lower limit value. 
 
b15 b14 b13 b12 b11 b10 b9 b8
b7
b6
b5
b4 b3 b2 b1 b0
CH4 CH3 CH2 CH1CH4 CH3 CH2 CH1CH4 CH3 CH2 CH1
  Input signal
error detection
Rate alarm setting Process alarm setting
0: Enable, 1: Disable
For Q62AD-DGH, information of b2, b3, b6, b7, b10, b14 and b15 is fixed at 0.
CH4 CH3 CH2 CH1
  Input signal error
detection extended
0: Same upper limit value/
    lower limit value,
1: Different upper limit value/
    lower limit value.
 
 
[Setting example of Q64AD-GH] 
When performing the following settings, store 49FE
H(18942) to the buffer 
memory address 47 (Un\G47). 
• The channel 1 specified for the process alarm setting is set to 0 (enabled). 
• The channel 2 and 3 specified for input signal error detection are set to 0 
(enabled). 
• The channel 3 specified for input signal error detection extended setting is set to 
1 (different value of lower and upper limit). 
 
b15
CH4 CH3 CH2 CH1
EB0
0BFE
H 
(3070)0000101111111110
b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
F
CH4 CH3 CH2 CH1CH4 CH3 CH2 CH1
 
 
[Setting example of Q62AD-DGH] 
When performing the following settings, store 2332
H(9010) to the buffer memory 
address 47 (Un\G47). 
• The channel 1 specified for the process alarm setting is set to 0 (enabled). 
• The channel 1 and 2 specified for input signal error detection are set to 0 
(enabled). 
• The channel 2 specified for input signal error detection extended setting is set to 
1 (different value of lower and upper limit). 
 
b15
CH2 CH1
232
2332
H 
(9010)00 01 011 11 10
b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
3
CH2 CH1CH2 CH1 CH2 CH1
00000