Motorola M68000 - Single Operand Instruction Execution Times

MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 7- 5
shown in the previously described format. The number of clock periods, the number of
read cycles, and the number of write cycles, respectively, must be added to those of the
effective address calculation where indicated by a plus sign (+).
In Table 7-6, the following notation applies:
# — Immediate operand
Dn — Data register operand
An — Address register operand
M — Memory operand
Table 7-6. Immediate Instruction Execution Times
Instruction Size op #, Dn op #, An op #, M
ADDI Byte
Word
Long
16(4/0)
16(4/0)
28(6/0)
—
—
—
20(4/1)+
24(4/2)+
40(6/4)+
ADDQ Byte
Word
Long
8(2/0)
8(2/0)
12(2/0)
—
12(2/0)
12(2/0)
12(2/1)+
16(2/2)+
24(2/4)+
ANDI Byte
Word
Long
16(4/0)
16(4/0)
28(6/0)
—
—
—
20(4/1)+
24(4/2)+
40(6/4)+
CMPI Byte
Word
Long
16(4/0)
16(4/0)
26(6/0)
—
—
—
16(4/0)
16(4/0)
24(6/0)
EORI Byte
Word
Long
16(4/0)
16(4/0)
28(6/0)
—
—
—
20(4/1)+
24(4/2)+
40(6/4)+
MOVEQ Long 8(2/0) ——
ORI Byte
Word
Long
16(4/0)
16(4/0)
28(6/0)
—
—
—
20(4/1)+
24(4/2)+
40(6/4)+
SUBI Byte
Word
Long
16(4/0)
16(4/0)
28(6/0)
—
—
—
12(2/1)+
16(2/2)+
24(2/4)+
SUBQ Byte
Word
Long
8(2/0)
8(2/0)
12(2/0)
—
12(2/0)
12(2/0)
20(4/1)+
24(4/2)+
40(6/4)+
+Add effective address calculation time.
7.5 SINGLE OPERAND INSTRUCTION EXECUTION TIMES
Table 7-7 lists the timing data for the single operand instructions. The total number of
clock periods, the number of read cycles, and the number of write cycles are shown in the
previously described format. The number of clock periods, the number of read cycles, and
the number of write cycles, respectively, must be added to those of the effective address
calculation where indicated by a plus sign (+).
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
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