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Motorola M68000
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MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSOR USER’S MANUAL 2-9
Notation for operands:
PC Program counter
SR Status register
V Overflow condition code
Immediate Data Immediate data from the instruction
Source Source contents
Destination Destination contents
Vector Location of exception vector
+inf Positive infinity
–inf Negative infinity
<fmt> Operand data format: byte (B), word (W), long (L), single
(S), double (D), extended (X), or packed (P).
FPm One of eight floating-point data registers (always
specifies the source register)
FPn One of eight floating-point data registers (always
specifies the destination register)
Notation for subfields and qualifiers:
<bit> of <operand> Selects a single bit of the operand
<ea>{offset:width} Selects a bit field
(<operand>) The contents of the referenced location
<operand>10 The operand is binary-coded decimal, operations are
performed in decimal
(<address register>) The register indirect operator
–(<address register>) Indicates that the operand register points to the memory
(<address register>)+ Location of the instruction operand—the optional mode
qualifiers are –, +, (d), and (d, ix)
#xxx or #<data> Immediate data that follows the instruction word(s)
Notations for operations that have two operands, written <operand> <op> <operand>,
where <op> is one of the following:
The source operand is moved to the destination operand
The two operands are exchanged
+ The operands are added
The destination operand is subtracted from the source
operand
× The operands are multiplied
÷ The source operand is divided by the destination
operand
< Relational test, true if source operand is less than
destination operand
> Relational test, true if source operand is greater than
destination operand
V Logical OR
Logical exclusive OR
Λ Logical AND
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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