Motorola M68000 - Page 28

2-14 M68000 8-/16-/32-BIT MICROPROCESSOR USER’S MANUAL MOTOROLA
Table 2-2. Instruction Set Summary (Sheet 4 of 4)
Opcode Operation Syntax
RTE If supervisor state
then (SP) → SR; SP + 2 → SP; (SP) → PC;
SP + 4 → SP;
restore state and deallocate stack according to (SP)
else TRAP
RTE
RTR (SP) → CCR; SP + 2 → SP;
(SP) → PC; SP + 4 → SP
RTR
RTS (SP) → PC; SP + 4 → SP RTS
SBCD Destination
10
– Source
10
– X → Destination SBCD Dx,Dy
SBCD –(Ax),–(Ay)
Scc If condition true
then 1s → Destination
else 0s → Destination
Scc <ea>
STOP If supervisor state
then Immediate Data → SR; STOP
else TRAP
STOP # <data>
SUB Destination – Source → Destination SUB <ea>,Dn
SUB Dn,<ea>
SUBA Destination – Source → Destination SUBA <ea>,An
SUBI Destination – Immediate Data → Destination SUBI # <data>,<ea>
SUBQ Destination – Immediate Data → Destination SUBQ # <data>,<ea>
SUBX Destination – Source – X → Destination SUBX Dx,Dy
SUBX –(Ax),–(Ay)
SWAP Register [31:16] ↔ Register [15:0] SWAP Dn
TAS Destination Tested → Condition Codes; 1 → bit 7 of
Destination
TAS <ea>
TRAP SSP – 2 → SSP; Format/Offset → (SSP);
SSP – 4 → SSP; PC → (SSP); SSP–2 → SSP;
SR → (SSP); Vector Address → PC
TRAP # <vector>
TRAPV If V then TRAP TRAPV
TST Destination Tested → Condition Codes TST <ea>
UNLK An → SP; (SP) → An; SP + 4 → SP UNLK An
NOTE: d is direction, L or R.
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