Murr Elektronik 55530 - Page 79

Configuration/settings
User manual 55530_hdb_en_16 79 / 156
Pin/port-based IO layout
 defines the arrangement of individual channels in the process data.
This relates to inputs and outputs as well as to the associated qualifiers.
Tab. 8-16: Pin/port-based IO layout
Tab. 8-17: Port-based data layout
Tab. 8-18: Pin-based data layout
NOTE
Art.-No. 55531
Port X6 and X7 Pin 4 only in SIO mode (default I/O mode)
NOTE
Art.-No. 55532
Port X4 ... X7 Pin 4 only in SIO mode (standard I/O mode)
Selection Meaning
D = Default
Port-based D The arrangement is sorted by ports in ascend-
ing order.
Pin-based The arrangement is sorted by pins in ascending
order.
Port-based I/O data / Qualifier
I/O Byte 0
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
Port X0
Pin 4
Port X0
Pin 2
Port X1
Pin 4
Port X1
Pin 2
Port X2
Pin 4
Port X2
Pin 2
Port X3
Pin 4
Port X3
Pin 2
I/O Byte 1
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
Port X4
Pin 4
Port X4
Pin 2
Port X5
Pin 4
Port X5
Pin 2
Port X6
Pin 4
Port X6
Pin 2
Port X7
Pin 4
Port X7
Pin 2
Pin-based I/O data / Qualifier
I/O Byte 0
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
Port X0
Pin 4
Port X1
Pin 4
Port X2
Pin 4
Port X3
Pin 4
Port X4
Pin 4
Port X5
Pin 4
Port X6
Pin 4
Port X7
Pin 4
I/O Byte 1
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
Port X0
Pin 2
Port X1
Pin 2
Port X2
Pin 2
Port X3
Pin 2
Port X4
Pin 2
Port X5
Pin 2
Port X6
Pin 2
Port X7
Pin 2