NXP Semiconductors FS4500 - KL25 Z ADC Inputs (J10_FRDM)

NXP Semiconductors FS4500/FS6500 evaluation boards
KTFRDMFS4500-FS6500EVMUG
FS4500/FS6500 evaluation boards All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
User guide Rev. 4.0 — 12 June 2017
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Pin number Connection Description
3 V
AUX
V
AUX
auxiliary voltage regulator
4 GND Ground
5 V
CORE
V
CORE
voltage output
6 GND Ground
7 V
PRE
V
PRE
regulator output regulator
8 GND Ground
4.5.4.7 KL25Z ADC inputs (J10_FRDM)
The KL25Z ADCconnector (J10_FRDM) connects the FS6500 regulator outputs to
the ADCs on the KL25Z. The regulator values can then be measured and displayed in
FlexGUI.
Table 13. KL25Z Analog regulator inputs (J10_FRDM)
Pin number FRDM Signal Description
1 Vkam_IO5 Keep alive memory voltage, connected to KL25 ADC0_SE0
2 V
CORE
V
CORE
voltage output, connected to KL25 ADC0_SE8
3 RXL LIN receiver data. Logic level.
4 V
AUX
V
AUX
auxiliary voltage regulator, connected to KL25
ADC0_SE9
5 VDDIO Reference voltage for IOs, connected to KL25 ADC0_SE3
6 V
CCA
V
CCA
output voltage, connected to KL25 ADC0_SE12
7 Not connected
8 CAN_5V CAN voltage regulator, connected to KL25 ADC0_SE13
9 Not connected
10 MUX_OUT Multiplexer output
11 TXC CAN transmit data. Logic level.
12 Not connected