Table 3. SerDes protocols
SERDES1
SRDS_PRTCL_S1 A B C D E F G H Per lane PLL mapping
66 XFI9 XFI10 XFI1 XFI2 PCIe4
1111
2222
SERDES2
SRDS_PRTCL_S2 A B C D E F G H Per lane PLL mapping
15 PCIe1 PCIe
2
PCI
e2
SAT
A1
SAT
A2
1111
1122
The image below shows the SerDes distribution of T2080RDB-PC.
10G
10G
1G
1G
10G
10G
10GBaseT
XFI.
9-
10G
RGMII
RGMII
SERDES 1 66
XFI.1-
10G XFI.2-10G
T2080
SERDES 2 15
PCle2
SATA
FSL
C293
SATA
Conn
PCle x 4 Gen3 support
XFI.
10-
10G
PCle
SATA
SATA
Conn
10GBaseT
PCle1 x 4
Gen2
PCle4 x 4
Gen3
X4 PCle
Gen3 slot
Figure 7. SerDes distribution of T2080RDB-PC
2.6.1 PCI Express support
The T2080RDB-PC supports PCIe x4 Gen 3 for golden finger and PCIe x4 Gen 2 for slot.
2.6.2 XFI 10G optics port support
The T2080 supports evaluation of the XFI protocol using Cortina CS4315 dual port 10G CDR. 10G data is carried over the XFI
interface. The image below shows the connectivity of XFI interface.
NXP Semiconductors
Architecture
QorIQ T2080 Reference Design Board (T2080RDB-PC) User Guide, Rev. 1, 08/2021
User Guide 15 / 44