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NXP Semiconductors QorIQ T2080 - Block Diagram; Chapter 2 Architecture

NXP Semiconductors QorIQ T2080
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1.5 Block diagram
The T2080RDB-PC supports two modes of operation, the Standalone mode and the Endpoint mode. There is one configuration
in the Standalone mode and second configurations is in the Endpoint mode, the major differences are in the PCIe support. All
configurations have NXP C293, 4x XFI, 2x RGMII, DDR, NOR, NAND, SPI EEPROM, I2C EEPROM, and GPIO. FPGA/CPLD
controls the muxing.
DMAx3
Power architecture
e6500
Power architecture
e6500
Power architecture
e6500
32 KB
D-Cache
2 MB Banked L2
Pre-Fetch
512 KB
Plat cache
64-bit DDR3/3L
with ECC
MPIC
Preboot loader
Security monitor
Internal bootROM
Power mgmt
SDXC/eMMC
eSPI
2 x DUART
4x I
2
C
2 x USB2.0 w/PHY
Clocks/reset
DCE
RMan
PME
BMan
SEC QMan
PAMU PAMU
CoreNet
coherency fabric
PAMU
(peripheral access management unit)
FMan
Parse, classify,
distribute
Buffer
HiGig
DCB
8 lanes up to 10 GHz SerDes
PCle
SATA2.0
Perf
Monitor
Watch point
cross-
trigger
Aurora
Real-time
debug
32 KB
I-Cache
32 KB
D-Cache
32 KB
I-Cache
32 KB
D-Cache
32 KB
I-Cache
32 KB
D-Cache
32 KB
I-Cache
PCle
PCle
PCle
sRIO
SATA2.0
sRIO
8 lanes up to 8 GHz SerDes
CoreNet
trace
4x 1/2.5/1OG
1GE 1GE
1GE 1GE
GPIO
CCSR
IFC
Power architecture
e6500
Figure 1. T2080 block diagram
NXP Semiconductors
Overview
QorIQ T2080 Reference Design Board (T2080RDB-PC) User Guide, Rev. 1, 08/2021
User Guide 8 / 44

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