NXP Semiconductors QorIQ T2080 - Boot Configuration Register 2 (BOOTCFG2)

Diagram
Bits
0 1 2 3 4 5 6 7
R
cfg_rcw_src
W
Reset
0 0 0 0 0 0 0 0
Fields
Field Function
0-7
cfg_rcw_src
cfg_rcw_src
For details, see T2080 Integrated Multicore Communications Processor Family Reference
Manual (document T2080RM).
NOTE
3.1.14 Boot configuration register 2 (BOOTCFG2)
Offset
Register Offset
BOOTCFG2 18h
Diagram
Bits
0 1 2 3 4 5 6 7
R
cfg_rcw... Reserved cfg_svr Reserved cfg_eng_use
W
Reset
0 0 0 0 0 0 0 0
Fields
Field Function
0
cfg_rcw_src8
cfg_rcw_src8
RCW source bit 8.
1
—
-
2-3
cfg_svr
cfg_svr
cfg_svr bits for Power-on Reset using.
4
-
Table continues on the next page...
NXP Semiconductors
CPLD Specification
QorIQ T2080 Reference Design Board (T2080RDB-PC) User Guide, Rev. 1, 08/2021
User Guide 40 / 44