NXP Semiconductors QorIQ T2080 - Chip ID2 Register (CHIPID2); Hardware Version Register (HWVER)

Diagram
Bits
0 1 2 3 4 5 6 7
R CHIPID1
W
Reset
0 1 0 1 0 1 0 1
Fields
Field Function
0-7
CHIPID1
CHIPID1
0x55, Identification of the CPLD image.
3.1.3 Chip ID2 register (CHIPID2)
Offset
Register Offset
CHIPID2 1h
Diagram
Bits
0 1 2 3 4 5 6 7
R CHIPID2
W
Reset
1 0 1 0 1 0 1 0
Fields
Field Function
0-7
CHIPID2
CHIPID2
0xaa, Identification of the CPLD image.
3.1.4 Hardware version register (HWVER)
Offset
Register Offset
HWVER 2h
Function
Hardware version register.
NXP Semiconductors
CPLD Specification
QorIQ T2080 Reference Design Board (T2080RDB-PC) User Guide, Rev. 1, 08/2021
User Guide 31 / 44