NXP Semiconductors QorIQ T2080 - T2080 RDB-PC Board Features

— Memory pre-fetch engine
• Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions:
— Packet parsing, classification, and distribution (Frame Manager 1.1)
— Queue management for scheduling, packet sequencing, and congestion management (Queue Manager 1.1)
— Hardware buffer management for buffer allocation and de-allocation (Buffer Manager 1.1)
— Cryptography Acceleration (SEC 5.2)
— RegEx Pattern Matching Acceleration (PME 2.1)
— Decompression/Compression Acceleration (DCE 1.0)
— DPAA chip-to-chip interconnect, using RapidIO Message Manager (RMan 1.0)
• 16 SerDes lanes at up to 10 GHz.
• Eight Ethernet interfaces, supporting combinations of:
— Up to four 10 Gbit/s Ethernet MACs
— Up to eight 1 Gbit/s Ethernet MACs
— Up to four 2.5 Gbit/s Ethernet MACs
— IEEE 1588 standard support.
• High-speed peripheral interfaces:
— Four PCI Express controllers (two supporting PCIe 2.0 and two supporting PCIe 3.0)
— Two Serial RapidIO 2.0 controllers running at up to 5 GHz with Type 11 messaging and Type 9 data streaming support
• Additional peripheral interfaces:
— Two Serial ATA (SATA 2.0) controllers
— Two high-speed USB 2.0 controllers with integrated PHY
— Enhanced secure digital host controller (SD/MMC/eMMC)
— Enhanced Serial peripheral interface (eSPI)
— Four I2C controllers
— Four 2-pin UARTs or two 4-pin UARTs
— Integrated flash controller supporting NAND and NOR flash
• Three 8-channel DMA engines
• 896 FC-PBGA package, 25 mm x 25 mm, 0.8 mm pitch
1.4 T2080RDB-PC board features
The T2080RDB-PC board features are as follows:
• SerDes connections
— 16 lanes configuration:
◦ SerDes-1 Lane A-B: to two 10GSFP+ (MAC9 and MAC10)
◦ SerDes-1 Lane C-D: to two 10GBase-T (MAC1 and MAC2)
◦ SerDes-1 Lane E-H: to PCIe slot (PCIe4 x4, Gen3)
◦ SerDes-2 Lane A-D: to PCIe Goldfinger (PCIe1 x4, Gen2)
◦ SerDes-2 Lane E-F: to C293 secure coprocessor (PCIe2 x2)
NXP Semiconductors
Overview
QorIQ T2080 Reference Design Board (T2080RDB-PC) User Guide, Rev. 1, 08/2021
User Guide 6 / 44