NXP Semiconductors QorIQ T2080 - Page 7

◦ SerDes-2 Lane G-H: to SATA1 and SATA2
• DDR controller
— Supports data rates of up to 1600 MHz or 1866 MHz
— Supports one DDR3L DIMM of single, dual-rank types
— DDR power supplies 1.35 V to all devices with automatic tracking of VTT
• IFC/Local Bus
— NAND flash: 8 bit, async, up to 1 GB
— NOR: 16 bit, non-multiplexed, up to 128 MB, NOR devices support 8 virtual banks
• Ethernet
— Two onboard RGMII 10/100/1G Ethernet ports
— Two onboard XFI 10GEDC for 10G SFP+ port
— Two onboard XFI 10GBase-T ports
• CPLD
— PCBA version identify
— Manages system power and reset sequencing
— Configures DUT, board, clock with dynamic
— Reset and interrupt monitor and control
— General fault monitoring and logging
• Clocks
— System and DDR clock (SYSCLK, DDRCLK)
◦ Switch selectable to one of the 16 common settings in the interval 64 MHz-166 MHz
◦ Software programmable in 1 MHz increments from 1-200 MHz
— SerDes clocks
◦ Provides clocks to all SerDes blocks and slots
◦ 100 MHz
◦ 156.25 MHz
• Power supplies
— Dedicated PMBus regulator for core power; adjustable from 0.7 V to 1.3 V at 60 A
• USB
— Supports two USB 2.0 ports with integrated PHYs: Two type A ports with 5 V @ 1.5 A per port
• MicroSD card
— MicroSD port connects directly to MicroSD or TF
• SPI
— Onboard support of SPI flash
• Other I/O
— Two serial ports
— Two I2C ports
NXP Semiconductors
Overview
QorIQ T2080 Reference Design Board (T2080RDB-PC) User Guide, Rev. 1, 08/2021
User Guide 7 / 44