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Oki B4100 - Page 84

Oki B4100
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42640901TH Rev.1 84 /
Oki Data CONFIDENTIAL
8) Signal Level
Input / Output Level
Note:
The width of EOP is defined in bit times relative to the device type receiving the EOP. The
bit time is approximate.
Differential "1"
Differential "0"
Single-ended 0 (SE0)
Data J state:
Low-speed
Full-speed
Data K state:
Low-speed
Full-speed
Idle state:
Low-speed
Full-speed
Resume state
Start-of-Packet (SOP)
End-of-Packet (EOP)
Disconnect
(at downstream port)
Connect
(at downstream port)
Reset
(D+) - (D-) > 200mV and D+ > V
IH
(min)
(D-) - (D+) > 200mV and D- > V
IH
(min)
D+ and D- < V
IL
(max)
Differential "0"
Differential "1"
Differential "1"
Differential "0"
D- > V
IHZ
(min) and D+ < V
IL
(max)
D+ > V
IHZ
(min) and D- < V
IL
(max)
Data K state
Data lines switch from Idle to K state
SE0 for
1 bit time
1
followed by a J state
for 1 bit time
SE0 for
2.5
µ
s
Idle for
2ms
D+ and D- < V
IL
(max) for
10ms
(D+) - (D-) > 200mV
(D-) - (D+) > 200mV
D+ and D- < V
IH
(min)
D- > V
IHZ
(min) and D+ < V
IH
(min)
D+ > V
IHZ
(min) and D- < V
IH
(min)
SE0 for
1 bit time
1
followed by a J state
Idle for
2.5
µ
s
D+ and D- < V
IL
(max) for
2.5
µ
s
Required
Signaling Levels
Bus State
Acceptable
Parameter
Input Levels :
High (driven)
High (floating)
Low
Output Levels :
Low
High (driven)
Output Signal Crossover Voltage
Symbol
V
IH
V
IHZ
V
IL
OL
OH
V
CRS
Min.
2.0
2.7
0.0
2.8
1.3
Max.
3.6
0.8
0.3
3.6
2.0
Units
V
V
V
V
V
V
Signaling Levels

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