Figure 5: Back of PHD70 showing connectors
PHD70 J1 Connector Pinout
GPIO7 (digital input/low power output)
GPIO1 (digital input/low power output)
GPIO6 (digital input/low power output)
OUTPUT2 (low-side output)
CAN1_TERM (CAN termination)
+VBATT (Positive battery)
GPIO5 (digital input/low power output)
GPIO4 (digital input/low power output)
GPIO3 (digital input/low power output)
GPIO2 (digital input/low power output)
P12V0 (12V regulated supply)
OUTPUT1 (low-side output)