4 Memory Organization
Address
Intel Mot.
Name Bit No. Significance (Write Access!)
00H 01H Int-Req-Reg 7..0
01H
00H Int-Req_Reg 15..8
02H
03H Int-Ack-Reg 7..0
03H
02H Int-Ack-Reg 15..8
04H
05H
Int−Mask-Reg 7..0
05H
04H
Int−Mask-Reg 15..8
Interrupt-Controller-Register
06H
07H Mode-Reg0 7..0
07H
06H Mode-Reg0 15..8
Setting parameters for individual bits
08H
Mode-Reg1-S 7..0
09H
Mode-Reg1-R 7..0
0AH WD_BAUD_CONTROL_Val 7..0
Square-root value for
baud rate monitoring
0BH
minT
SDR
_Val 7..0
minT
SDR
time
0CH
Mode-Reg2 7..0
Mode Register 2
0DH
Sync_PW_Reg 7..0 Sync Pulse Width Register
0EH
Control_Command_Reg 7..0
Control_Command value for
comparison with SYNCH telegram
0FH
Group_Select_Reg 7..0
Group_Select value for comparison
with SYNCH telegram
10H
11H
12H
13H
14H
15H
Reserved
Figure 4-3: Assignment of the Internal Parameter-Latches for WRITE
16 Revision 1.03
VPC3+C
User Manual
Copyright © profichip GmbH 2004-2006
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