Profichip VPC3+C - Application with 80 C32 (4 K Byte RAM Mode)

8 Hardware Interface
8.1.5 Application with 80C32 (4K Byte RAM Mode)
V
PC3+
CLK
RESET
MODE
ALE
XWR
XRD
XTEST0
XTEST1
DIVIDER
48 MHz
1K
3K3
3K3
3K3
GND
VDD
µC
µC
µC
5
8
1
43
41
29
CLK2
XDATAEX
RTS
TXD
A
B(15..8)
connect to VDD or GND
XWR
XRD
36
23
24
2
4
34
35
3
XREADY
X/INT
XCTS
RXD
40
37
42
32
31
25
10
µC
1K
RS485
RS485
RS485
7
13
27
26
11
21
14
9
33
30
GND
VDD
VDD
12
15
16
19
20
22
µC
DB(7..0)
AB0
AB1
AB2
AB8
LED for Data_Exchange
/MOTXINT
µC
XCS/AB11
AB3
AB4
AB5
AB6
AB7
DB0
DB1
DB2
DB3
DB4
DB5
AB9
AB10
DB6
DB7
µC
ADB0
ADB6
AB8
AB9
AB10
AB11
ADB1
ADB2
ADB3
ADB4
ADB5
AB12
AB13
AB14
AB15
ADB7
1K
1K
1K
GND
1
1K
44
Figure 8-8: 80C32 Application in 4K Byte mode
The internal chipselect is activated when the address inputs AB[10..3] of
the VPC3+C are set to '0'.
In the example above the start address of the VPC3+C is set to 2000H.
CS
decoder
4.0 KB
address
latch
8
ALE
AD[7..0]
ALE
Processor VPC3+ B
RAM
8
312
B[10..8]
internal address
DB[7..0]
AB[2..0]
XCS/A11
4 1
all bits
zero
AB[15..12]
internal chip
select
A
AB[11]
AB[6..3]
AB[10..7]
8
4
Figure 8 s Intel Mode, 4K Byte RAM -9 : Internal Chipselect Generation in Synchronou
76 Revision 1.03
VPC3+C
User Manual
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