Profichip VPC3+C - Interrupt Request Register (IRR)

5 ASIC Interface
The polarity of the interrupt output is parameterized via the Int_Pol bit in
Mode Register 0. After hardware reset, the output is low-active.
5.3.1 Interrupt Request Register
Bit Position
Address
7 6 5 4 3 2 1 0
Designation
00H
(Intel)
DXB_Out New_Ext_ Prm_Data DXB_Link_ Error User_Timer_ Clock WD_DP_ CONTROL_Timeout Baud_Rate_ Detect Go/Leave_ DATA-EXCH MAC_Reset
Int-Req-Reg
7 .. 0
See below
for coding
Bit Position
Address
15 14 13 12 11 10 9 8
Designation
01H
(Intel)
FDL_Ind Poll_End_Ind DX_Out Diag_Buffer_ Changed New_Prm_ Data New_Cfg_ Data New_SSA_ Data New_GC Command
Int-Req-Reg
15 .. 8
See below
for coding
28 Revision 1.03
VPC3+C
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