2 Functional Description
The integrated Watchdog Timer is operated in three different states:
BAUD_SEARCH, BAUD_CONTROL and DP_CONTROL.
The Micro Sequencer (MS) controls the entire process. It contains the DP-
Slave state machine (DP_SM).
The integrated 4K Byte RAM that operates as a Dual-Port-RAM contains
procedure-specific parameters (buffer pointer, buffer lengths,
Station_Address, etc.) and the data buffers.
In the UART, the parallel data flow is converted into the serial data flow and
vice-versa. The VPC3+C is capable of automatically identifying the baud
rates (9.6 Kbit/s - 12 Mbit/s).
The Idle Timer directly controls the bus times on the serial bus line.
8 Revision 1.03
VPC3+C
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