Renesas TPS-1 User Manual

TPS-1 User’s Manual: Hardware 3. Host Interface
R19UH0081ED0107 Rev. 1.07 page 32 of 86
Jul 30, 2018
The time between two complete data transfers is calculated with the following equation:
L = ((4 * (T
Wait
+ 10)) – 8 * f
sys
/f
SPI
) (L * 1/fsys = break between two cycle);
The following figure shows two SPI transfers (each 5 byte long) and the wait time between this cycles.
e.g. TPS_GetValue16() e.g. TPS_GetValue16()
HOST_SCLK_IN
Wait Time between
two SPI transfers (L)
1. Dat a - transfer
HOST_SRXD_IN
HOST_STXD_OUT
CMD-
By te
ADR-
By te
ADR-
By te
Data
By te
Data
By te
CMD-
By te
ADR-
By te
ADR-
By te
Data
By te
Data
By te
CMD-
By te
ADR-
By te
ADR-
By te
Data
By te
Data
By te
CMD-
By te
ADR-
By te
ADR-
By te
Data
By te
Data
By te
2. Dat a - transfer
Figure 3-15: Two SPI transfers with wait time

Renesas TPS-1 Specifications

General

Brand	Renesas
Model	TPS-1
Category	Controller
Language	English