Siemens et 200sp - Page 105

Configuring/address space
4.5 Frequency output mode
Technology Module TM Pulse 2x24V (6ES7138‑6DB00‑0BB1)
104 Manual, 05/2019, A5E35061186-AB
Byte
offset
relative
to start
address
Channel
0/1
↓ ↓
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
9 21 Reserved SET_DQB SET_DQA Reserved TM_
CTRL_DQ
SW_
ENABLE
10 22 Reserved RES_
ERROR
11
23
Reserved
Note
Channel 1 is only available in two
-channel operation of the module.
Control bit/value
Explanations
OUTPUT_VALUE You specify the frequency with this value.
Value range:
• Frequency in Hz, when High-speed output is deactivated: 0.02 to 10000
D
• Frequency in Hz, when high-speed output is activated: 0.02 to 100000
D
If the low limit or the high limit is violated, the feedback bit ERR_OUT_VAL is set and the last
valid frequency is used.
SLOT You specify the load value with this value.
Value range:
• On delay in μs: 0 to 85000000
D
You specify whether to apply a change once or cyclically with MODE_SLOT.
Invalid values trigger setting of feedback bit ERR_LD (when MODE_SLOT = 0) or
ERR_SLOT_VAL (when MODE_SLOT = 1).
MODE_SLOT You specify whether you want to apply a change in SLOT once or cyclically with this bit.
0 means: As soon as you write the value 2
D
in the corresponding output byte, the value from
SLOT is applied once and kept until the next change. A change via SLOT takes effect at the
next output sequence. After a restart of the module, the value is overwritten with the value set
in the hardware configuration.
1 means: When you write the value 18
D
in the corresponding output byte, the current value
from SLOT in each case is applied cyclically. A change via SLOT takes effect at the next output
sequence.
LD_SLOT You specify the meaning of the value in SLOT with this load request:
• 0000
B
means: No action, idle
• 0010
B
means: On delay in μs
Values not listed are invalid and trigger setting of feedback bit ERR_LD (when MODE_SLOT =
0) or ERR_SLOT_VAL (when MODE_SLOT = 1).
SET_DQA
You use this bit to set digital output DQn.A when TM_CTRL_DQ and SET_DQB are set to 0.
SET_DQB
You use this bit to set digital output DQn.B when TM_CTRL_DQ and SET_DQA are set to 0.