Tables
5-1. Order of Suboperations for Direct Access to Digital Modules . . . . . . . . . . . . . .5 - 9
Figures
5-1. Digital Address Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 1
5-2. Setting Addresses on the Addressing Panel of the IM 306 Interface Module . 5 - 3
5-3. Setting a DIP Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 4
5-4. Addressing Input and Output Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 5
5-5. Location of the Process Images . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 5
5-6. Accessing the PII in the Case of Digital Input Modules . . . . . . . . . . . . . . . . . . . . .5 - 6
5-7. Accessing the PIQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 7
5-8. Loading Input and Output Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 8
5-9. CPU Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 10
5-10. Address Assignment in the I/O Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 11
5-11. Chronological Sequence of Interrupt Processing . . . . . . . . . . . . . . . . . . . . . . . . .5 - 14
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