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General| Series | SIMATIC S5 |
|---|---|
| Model | S5-95F |
| Input Voltage | 24 V DC |
| Digital Outputs | 16 |
| Analog Inputs | 4 |
| Analog Outputs | 2 |
| Programming Language | STEP 5 |
| Type | Programmable Logic Controller (PLC) |
| Communication | RS-485 |
Describes the basic unit's design without external expansions, focusing on onboard I/Os.
Explains how to expand the basic system using S5-100U modules for external I/Os.
Details internal functions like the real-time clock, diagnostic byte, and communication byte.
Explains the controller's operational principle, functional units, and I/O bus structure.
Provides information on displays, controls, operating modes, and overall reset procedures.
Focuses on integrating the PLC into the system environment safely, avoiding hazards.
Covers electromagnetic compatibility (EMC) principles for PLC installation and interference-free operation.
Details specific installation practices for EMC, including grounding and assembly rules.
Provides guidelines on cable routing, equipotential bonding, and shield connection for EMC.
Describes the basic system configuration comprising two basic units interconnected via fiber optic link.
Explains the use of failsafe digital inputs, outputs, interrupt, and counter inputs.
Details how to connect actuators to failsafe digital outputs, including blanking times.
Covers onboard interrupt inputs (OB2 and OB3) and their connection via sub D connector.
Explains the use of onboard counter inputs, including parameterization in DB1.
Discusses monitoring 24 V DC supply voltage for onboard I/Os and interrupt/counter inputs.
Provides pin assignments for the 40-pin I/O connectors and the 9-pin sub D connector.
Guides on assembling tiers with external I/O modules, bus units, and interface modules.
Explains how to expand the configuration up to four tiers using interface modules.
Covers cabinet mounting for noise immunity, ventilation, and heat dissipation.
Details connection methods using screw-type and crimp snap-in terminals.
Explains the connection of failsafe input and output modules, and system reaction to I/O faults.
Describes connecting non-failsafe I/O modules, including digital I/O modules.
Details the electrical circuits required for the S5-95F, including internal and external power supplies.
Explains electrical potentials and configurations for onboard and external I/Os.
Discusses configuring the S5-95F with grounded or isolated reference potential for interference immunity.
Details the permanently assigned addresses for onboard I/Os and how they are structured.
Explains slot numbering and address assignment for external I/O modules based on tier configuration.
Describes how digital modules are addressed using a byte address and channel number.
Explains the addressing of analog modules, including reserved bytes and slot addressing changes.
Covers the use of combined input/output modules and their identical PII/PIQ addresses.
Details the structure of PII and PIQ tables, divided into four areas.
Explains the use of interrupt process image tables for time-controlled program processing.
Provides information on RAM addressing for the programmable controllers.
Explains how to write a program using STEP 5, including methods of representation like STL, CSF, and LAD.
Describes the two program types: linear and structured, and the concept of block calls.
Lists and compares different block types (OBs, PBs, SBs, FBs, DBs) and their characteristics.
Details how the control program is structured and managed by organization blocks (OBs).
Explains how to change programs and blocks, and the process of compressing program memory.
Covers the different number representations used in STEP 5, such as decimal, hexadecimal, and BCD.
Describes fundamental STEP 5 operations like Boolean logic, Set/Reset, Load/Transfer, Timers, Counters, Comparisons, and Arithmetic.
Covers complex functions like substitution, test functions, shift, and conversion operations.
Explains system operations that access system data directly, noting they are for experienced programmers.
Details how condition codes (CC0, CC1, OV) are generated by various operations like comparison and arithmetic.
Provides sample programs for momentary-contact relay/edge evaluation, binary scaler/divider, and clock/clock-pulse generator.
Explains the role of organization blocks (OBs) in interfacing the operating system and control program.
Lists and describes integrated function blocks (FB240-FB255) for tasks like code conversion, multiplication, division, and PID control.
Details how to program internal functions using DB1, including interrupt inputs, counters, real-time clock, and I/Os.
Explains the clock's functions, parameterization via DB1 or COM 95F, and data exchange.
Describes the layout of the clock data area in DB1, including time, date, and operating hours.
Explains the status word bits for identifying errors and controlling clock behavior.
Details how to read and set the clock using the programmer's "Block Output" function.
Provides examples for setting and evaluating clock time, date, prompt time, and operating hours.
Covers analog input modules, their operating principle, wiring, and start-up.
Provides rules for connecting sensors, including two-wire and four-wire transducer connections.
Explains how to set the operating mode switches and assign channels for analog input modules.
Shows how analog values are converted to digital formats and represented in bit patterns.
Details analog output modules, load connections, and analog value representation.
Explains how to read, scale, and output analog values using FB250 and FB251.
Covers interrupt inputs on the S5-95F, their connection, initialization in DB1, and priorities.
Explains asynchronous interrupt processing, its requirements, and pin assignments for counter/interrupt inputs.
Details synchronous interrupt processing, interrupt triggering, and special features.
Covers interrupt response times for OB2 and OB3 interrupts under typical and worst-case conditions.
Discusses the two ways to interface the S5-95F to the SINEC L1 LAN: point-to-point and bus terminal connections.
Explains non-failsafe data interchange, its characteristics, and initialization procedures.
Covers failsafe data interchange, message modes, initialization, and coordination.
Details SINEC L1 safety times for Receive and Send, including conditions and calculations.
Summarizes functions for debugging, including signal status display (STATUS, STATUS VAR) and forcing variables.
Explains the ISTACK analysis function to flag and ascertain the cause of faults.
Covers program errors detected during compilation and runtime, and how to determine error addresses.
Discusses restrictions on programmer functions in failsafe mode and parameter control DB usage.
Details measures for securing the user program, including checksum computation and COM 95F software.
Explains the process of storing the user program on EPROM submodules.
Describes how the S5-95F responds to various errors like Hard STOP, Soft STOP, and passivation.
Explains the function of the yellow error LED and the conditions under which it remains set.
Details the structure and contents of DB254, including product identification, system ID, and error group images.
Covers the procedure for acknowledging errors and deleting entries from the system event DB.
Explains how to output error messages to a printer using a CP 521.
Describes how the S5-95F can automatically forward system messages to the SINEC L1 master.
Explains how to collect and evaluate statistical data on cycle times using the programmer function OUTPUT ADDRESS.
Details how to evaluate diagnostic byte IB 35 for battery status and load voltage.
Compares onboard and external I/Os, including failsafe features and wiring differences.
Highlights differences in DB1 parameterization, programming access, and integral function blocks.
Compares cyclic, time-controlled, and interrupt-driven program scanning between the two models.
Lists the three operating modes: Test, Safety, and Quasi-safety, and their restart characteristics.
Discusses restrictions on programmer functions and error diagnostics in failsafe mode.
Explains the S5-95F's behavior and response to battery failure.
Lists the components required for the sample application, such as basic units and fiber optic cable.
Describes the process mimic of a simplified hydraulic lifting device and its operational sequence.
Provides step-by-step instructions for installing and wiring the S5-95F, including connecting I/Os and power.
Guides on copying block headers, performing resets, and transferring programs to EPROM.
Details the process of configuring onboard inputs and outputs using COM 95F software.
Explains how to test the program and simulate errors, including responses and corrective measures.
Provides a guideline for the acceptance test, covering planning, inspection, and system tests.
Discusses I/O addressing rules and special features of I/O usage.
Describes the three operating modes: Safety, Test, and Quasi-safety, and their restart characteristics.
Explains how to enter system identification and ID numbers in DB254 for failsafe operation.
Lists permissible memory submodules (EPROMs) required for safety mode operation.
Details the necessity and function of the backup battery for RAM contents retention.
Provides information on the retentivity of timers, counters, flags, data blocks, and system data.
Lists requirements for sensors, including prototype testing and automatic error detection.
Covers requirements for actuators, including blanking times and permissible actuator types.
Explains how the S5-95F responds to I/O errors, including STOP, passivation, and user program reactions.
Details the process of passivating I/Os belonging to independent subprocesses and their effects.
Explains how to depassivate I/Os using FB255 and the implications for PLC cycle time.
Describes choosing standard value formation for I/O errors and initiating user-level reactions.
Provides guidelines for hardware installation, removal, and replacement of system components.
Discusses maximum response times for cyclical, time-controlled, and interrupt processing.
Covers restrictions on STEP 5 operations and disabling/enabling interrupts.
Explains I/O addressing for onboard and external modules, including slot numbering.
Discusses user-written and standard function blocks, their usage, and safety considerations.
Details restrictions on programmer functions in failsafe mode and parameter control DB usage.
Explains interfacing text displays via the serial interface and safety considerations.
Provides notes on operating a SINEC L1 LAN, including master/slave roles and data interchange.
Details SINEC L1 safety times for Receive and Send, including conditions and calculations.
Discusses EMC characteristics for the IM 316 interface module.
Covers climatic, EMC, and safety specifications for failsafe modules.
Provides technical specifications for the S5-95F programmable controller, including dimensions, memory, and I/O.
Details technical specifications for digital input and output modules, including EMC characteristics.
Lists technical specifications for bus units with SIGUT screw-type and crimp snap-in connections.
Provides technical specifications for the IM 315 interface module.
Lists standard modules from the S5-100U family compatible with the S5-95F.
Shows dimensional drawings of the S5-95F programmable controller.
Provides dimension drawings for bus units with crimp snap-in and SIGUT screw-type terminals.
Shows dimension drawings for interface modules like IM 315 and IM 316.
Illustrates cross-sections and dimensions of standard mounting rails.
Lists typical execution times for basic, supplementary, and system operations.
Provides a machine code listing for various STEP 5 operations.
Defines abbreviations used in the manual, including operand types and parameters.
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