Interrupt Processing S5-95F
12.2 Asynchronous Interrupt Processing in OB2
The S5-95F is equipped with four separate failsafe interrupt inputs (I 59.0 to I 59.3) which trigger
asynchronous interrupt processing when there is a change (falling edge) in a process signal.
Asynchronous interrupt processing means that each subunit invokes OB2 as soon as it detects a
change in the signal at an interrupt input, without regard to the other subunit's signals.
The two subunits invoke OB2 at different times (asynchronously). The main advantage of
asynchronous interrupt handling is that an onboard output, and thus the relevant circuit, can be
reset very quickly via the user program.
The following is required for the interrupt inputs:
• They must be wired via the sub D connector
• If necessary, the parameters for interrupt processing must be changed accordingly in DB1
• These parameters must then be evaluated in OB2.
Connector Pin Assignments for Counter and Interrupt Inputs
Table 12-3. Pin Assignments for the 9-Pin Sub D Connector
11
22
33
44
55
66
77
88
99
L + (24 V DC supply)
Counter B input (IW 38)
Reference potential (M)
Counter A input (IW 36)
Reference potential (M)
Interrupt input I 59.0
Interrupt input I 59.1
Interrupt input I 59.2
Interrupt input I 59.3
DescriptionPin Number
Subunits A and B
Sub D Connector
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9
Sensor Requirements
The permissible discrepancy time for interrupt inputs (OB2) is fixed at approx. 1 ms.
For interrupt inputs (OB2), use either
• Single-channel failsafe sensors
or
• High-speed two-channel sensors with contacts so synchronous that identical circuit states are
possible within 1 ms.
12-2
EWA 4NEB 812 6210-02
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