Addressing S5-95F
6.6 Structure of Process Image Input and Output Tables
Data from inputs are stored in the process image input table (PII). Data from outputs are stored in
the process image output table (PIQ).
The PII and the PIQ each have an area of 128 bytes in the RAM memory.
The PII and the PIQ have identical structures. They can be divided into four areas:
Table 6-3. Structure of the Process Image Input Table (PII) and the Process Image Output
Table (PIQ)
Slot Number
External I/O 0 to 31
I/O AreaByte Address in the PII
and PIQ
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0 to 31
Onboard I/Os32 to 39, 59
External I/O 0 to 764 to 127
Diagnostic and communication bytes
56 to 58
60 to 63
• The address space for byte 0 through 31 is reserved for information from or to modules that are
addressed like digital modules.
• The reserved address space for information from or to the onboard I/Os:
- Byte 32 to 33 Failsafe digital inputs
- Byte 32 Failsafe digital outputs
- Byte 33 to 34 Non-failsafe digital outputs
- Byte 35 Hardware diagnostic byte
- Byte 36 to 39 Failsafe counters
- Byte 56 Communication byte OB1 --> OB2
- Byte 57 Indication of the occurred OB2 interrupts for evaluation in OB1
- Byte 58 Indication of the interrupt bits reset in OB2 for evaluation in OB1
- Byte 59 Failsafe OB2 interrupt inputs
- Byte 60 Indication of the occurred OB2 interrupts for evaluation in OB2
- Byte 61 to 63 Diagnostic byte for software interrupts
• The address space in bytes 64 to 127 is reserved for information from or to modules that are
addressed like analog modules.
The exact assignment of these four areas for the two programmable controllers is shown in the
following tables.
Note
Reading from an empty slot always results in signal state "0".
6-8
EWA 4NEB 812 6210-02
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