STEP 5 Operations S5-95F
8.5.3 Clock/Clock-Pulse Generator
This subsection describes how to program a clock-pulse generator.
Example: A clock-pulse generator can be implemented using a self-clocking timer that is followed
in the circuit by a binary scaler. Flag F 2.0 restarts timer T 7 each time it runs down,
i.e., flag F 2.0 is “1” for one cycle each time the timer runs down. The pulses of flag
F 2.0 applied to the binary scaler result in a pulse train with pulse duty factor 1:1 at
output Q 1.0. The period of this pulse train is twice as long as the time value of the
self-clocking timer.
Circuit DiagramTiming Diagram
T
F 2.0
Q 1.0
T
Time
Signal states
1
0
1
0
G F 2.0
F 3.0
Q 1.0
Q 1.0F 2.0
Q 1.0F 2.0
F 3.0F 2.0
F 3.0F 2.0
KT 10.1
F 2.0
T 7
T 7
LADSTL CSF
F 3.0
F 2.0
F 3.0
Q 1.0
F 2.0
KT 10.1
F 2.0
T 0
TV
BI
DE
R
Q
S
RQ
S
RQ
&
&
&
&
F 2.0
Q 1.0
F 2.0
Q 1.0
F 2.0
F 3.0
F 3.0
Q 1.0
F 2.0
( )
T 0
TV BI
DE
RQ
S
RQ
S
RQ
AN F 2.0
L KT 010.1
SD T 7
NOP 0
NOP 0
NOP 0
AT7
= F 2.0
***
A F 2.0
AN F 3.0
S Q 1.0
A F 2.0
A F 3.0
R Q 1.0
NOP 0
***
AN F 2.0
A Q 1.0
S F 3.0
AN F 2.0
AN Q 1.0
R F 3.0
NOP 0
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8-72
EWA 4NEB 812 6210-02
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