Sony HBD-DZ950 - Page 37

DAV-DZ350/DZ650/DZ950
37
IC500 TAS5538
I2C SERIAL
CONTROL
INTERFACE
CLOCK, PLL,
AND
SERIAL DATA
INTERFACE
PWM_HPM_L
1
PWM_HPP_L
2
PWM_HPM_R
3
PWM_HPP_R
4
PLL_FLTM
6
PLL_FLTP
7
LRCLK
22
SCLK
23
SDIN1
24
SDIN2
25
SDIN3
26
SDIN4
27
VR_DIG
28
RESET
16
HP_SEL
17
PDN
18
MUTE
ASEL_EMO2
10
EMO1
15
DVDD2_CORE
14
DVSS2_CORE
13
AVDD 9
VR_ANA
8
OSC_RES
12
MCLK
11
19
SDA
20
AVSS
5
DEVICE
CONTROL
DIGITAL
AUDIO
PROCESSOR
POWER
SUPPLY
SCL
21
AVSS_PWM
51
AVDD_PWM50
PWM_P_1
39
PWM_M_1
38
PWM_P_2
41
PWM_M_2
40
PWM_P_3
43
PWM_M_3
42
PWM_P_4
45
PWM_M_4
44
PWM_P_7
47
PWM_M_7
46
PWM_P_849
PWM_M_8
48
PWM_P_5
54
PWM_M_5
53
PWM_P_6
56
PWM_M_6
55
LRCLKO
31
SCLKO
30
PSVC
33
VALID
37
TEST
32
SDOUT29
VR_RWM
52
DVSS1_CORE
36
DVDD1_CORE
35
BKND_ERR
34
PWM
SECTION