Sony HCD-VX880AV - Page 54

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1 SENSE I Internal status (SENSE) signal input from the CXD3008Q (IC101)
2 SENSE CLK O Sense serial data reading clock signal output to the CXD3008Q (IC101)
3 DSP DATA O Serial data output to the CXD3008Q (IC101)
4 DSP LATCH O Serial data latch pulse output to the CXD3008Q (IC101)
5 DSP CLK O Serial data transfer clock signal output to the CXD3008Q (IC101)
6 LD ON O Laser power selection signal output to the CXA2568M (IC103) “H”: laser on
7 REMOTE IN I Remote control signal input terminal Not used (open)
8 BYTE I “External data bus line byte selection signal input “L”: 16 bit, “H”: 8 bit (fixed at “L”)
9 CN VSS — Ground terminal
10 DSP MUTE O Muting on/off control signal output to the CXD3008Q (IC101) “H”: mutin on
11 CTRL1 O Clock selection signal output to the CXD3008Q (IC101)
“L”: 16.9344 MHz (double speed), “H”: 33.8688 MHz
12 XRESET I Reset signal input from the system controller (IC501) “L”: reset
For several hundreds msec. after the power supply rises, “L”: is input, then it changes to “H”
13 XOUT O Main system clock output terminal (10 MHz)
14 VSS — Ground terminal
15 XIN I Main system clock input terminal (10 MHz)
16 VCC — Power supply terminal (+5 V)
17 NMI I Non-maskable interrupt input terminal (fixed at “H” in this set)
18 SCOR I Subcode sync (S0+S1) detection signal input from the CXD3008Q (IC101)
19 CTRL2 O AGC HOLD signal output.
20 8830 HINT I Interrupt request signal input from the MPEG video/audio decoder (IC506)
21 NT/PAL OUT O NTSC/PAL select signal output.
22 DF LATCH O Serial data latch pulse output to the D/A converter (IC509) “L”: activ
23 NC — Not used.
24 8830 RESET O Reset signal output to the MPEG video/audio decoder (IC506) “L”: reset
25 JOG1 I Rotary encoder jog dial pulse input terminal Not used (fixed at “H”)
26 JOG2 I Rotary encoder jog dial pulse input terminal Not used (fixed at “H”)
27 VMUTE O Video muting on/off control signal output terminal “L”: muting on
28 OSD CS O Chip select signal of D/A converter (IC511).
29 I2C/RX I/O I
2
C and serial data input from CD mechanism control (IC501).
30 I2C/TX I/O I
2
C and serial data output from CD mechanism control (IC501).
31 S-DATA O O Serial data output to the MPEG video/audio decoder (IC505) and D/A convertor (IC509)
32 S-DATA I I Serial data input from the MPEG video/audio decoder (IC505)
33 S-CLK O
Serial data transfer clock signal output to the MPEG video/audio decoder (IC505) and D/A
converter (IC509)
34 RTS1 O RTS signal to serial port (check connector).
35 NC O Not used (open)
36 SUBQ DATA I Sub-code Q data input from the CXD3008Q (IC101)
37 SUBQ CLK O Sub-code Q data reading clock signal output to the CXD3008Q (IC101)
38 P. ON O Power on/off control signal output terminal Not used (open)
39 BUS XRDY I Ready signal input terminal Not used (fixed at “H”)
40 BUS O Not used (open)
41 BUS XHOLD I Hold signal input terminal Not used (fixed at “H”)
Pin No.
Pin Name
I/O Function
• IC505 CD MECHANISM CONTROLLER (M30624FGFP) (VIDEO BOARD (1/2))