Sony MXD-D40 - Block Diagram - MAIN Section

MXD-D40
4848
6-2. BLOCK DIAGRAM – MAIN Section –
5
1
6
2
12
7
8
29
15
16
1
94
1
13
1
DIGITAL
INTERFACE
DECIMATION
FILTER
DC-
CANCELLATION
FILTER
A/D
CONVERTER
BLOCK
13
11
CLOCK
CONTROL
CLOCK AND
TIMING CIRCUIT
RESET
SWITCH
Q301
SPDIF
BUFFER
IC307
IEC 958
DECODER
DATA
IN/OUT
INTERFACE
D/A
CONVERTER
BLOCK
AUDIO FEATURE
PROCESSOR
INTERPOLATOR
NOISE SHAPER
21 33 37 12
J300
L
IN
OUT
ANALOG
R
L
R
LINE
AMP
IC305
LOW-PASS
FILTER
IC100 (1/2),
IC200 (1/2)
LINE
AMP
IC100 (2/2),
IC200 (2/2)
HEADPHONE
AMP
IC304
MUTING
Q100, 200
PHONE
LEVEL
PHONES
J301
2 6 7 3 11 19 25 42 43 45 100 78 79 7627 24
MUTING
Q101, 201
19
D302 D300
D303
RV301
75
77
74
73
62
37
MOTOR
DRIVE
MM
M702
(LOADING)
LOADING MOTOR DRIVE
IC401
OUT2
OUT1
IN2
IN1
SYSTEM CONTROLLER
(CD MECHANISM CONTROLLER)
IC800 (1/2)
3
95
30
30
13
29
4
29
IIC DATA IIC CLK
15
26
X800
16MHz
13 15
12S. RST
X801
10MHz
RESET
SWITCH
Q501
E
D
(Page 49)
(Page 49)
PDOWN
RESET
A
(Page 47)
B
(Page 47)
C
(Page 47)
F
(Page 47)
ADDT
DOUT
DIN0
LRCK, BCK
CD BLOCK
(BU-21BD53)
OP ASSY (A-MAX. 2)
CD DATA
CD CLK
SQ DATA
SQ CLK
XLT
SENS
SCOR
LDON
1 – 4 1 – 2
SPNDL MUTE
XRST
DOUT
DATA CLK SUBQ SQCK XLT SENS SCOR LDON 1 – 4
1 – 2
SPNDL MUTE XRST
DAC MUTE
LINE MUTE
OUT SW
IN SW
LOAD NEG
LOAD POS
LEVEL L
LEVEL R
LEVEL L
LEVEL R
IIC-DATA
X-OUT
X-IN
IIC-CLK
21EXT_ON
22CONNECT
MD RST
SPDIF_CUT
DA_RESET
SLICER_SEL
SPDIF LOCK
DAC MUTE
P. DOWN
LINE MUTE
XOUT XIN
MD MECHANISM CONTROLLER
IC801 (2/2)
WS
PWON
SCLK
CLKOUT
SPDIFO
SPDIFI
RESET
SLICER
SEL
DATAO
BCK
LRCK
BCK
LRCK, BCK
3
22
18
VOUTR
VOUTL
VINL
VINR
• SIGNAL PATH
: CD PLAY
: MD PLAY (ANALOG OUT)
: MD REC (ANALOG IN)
A/D CONVERTER
IC301
D/A CONVERTER
IC300
LOCK IISOUTBCK IISOUTWS
BCK
LRCK
MUTE
–1
–2
S1
(IN/OUT)
OUT
IN
ON: When tray is
open/close.
MUTING CONTROL
SWITCH
Q302
72 80 77
MUTING
SWITCH
Q300
PC LINK
J302
CLK
DATA
POWER
PCLK INSERTED
PCLK
CONNCTOR