Sony SSC-DC593 - Page 48

5-8
SSC-DC593/DC593P/DC598P (E)
CXD3301R (SONY)
37
38
39
40
41
42
43
44
45
46
47
48
24
23
22
21
20
19
18
17
16
15
14
13
36 35 34 33 32 31 30 29 28 27 26 25
1 2 3 4 5 6 7 8 9
10 11 12
10-BIT SIGNAL PROCESSOR FOR CCD CAMERA
—TOP VIEW—
1
2
3
4
5
6
7
8
9
10
11
12
—
—
O
O
O
O
O
O
O
O
O
O
NC
NC
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
13
14
15
16
17
18
19
20
21
22
23
24
—
—
—
I
—
—
I
I
I
I
I
—
D.V CC
GND
A.GND
ADCK
A.GND
A.V
CC
PBLK
CLPOB
XSHP
XSHD
CLPDM
A.V
CC
25
26
27
28
29
30
31
32
33
34
35
36
—
—
—
O
O
I
O
O
—
—
—
—
A.GND
A.GND
A.V
CC
C1
C2
CCDIN
C3
C4
A.V
CC
A.V CC
A.GND
A.GND
37
38
39
40
41
42
43
44
45
46
47
48
O
O
O
—
—
—
—
—
I
I
I
I
C5
C6
C7
A.V
CC
A.GND
AGND
NC
NC
XRST
XCS
SI
SCK
PIN
NO.
I/O SIGNAL
PIN
NO.
I/O SIGNAL
PIN
NO.
I/O SIGNAL
PIN
NO.
I/O SIGNAL
INPUTS
ADCK
CCDIN
CLPDM
CLPOB
PBLK
SCK
SI
XCS
XRST
XSHD
XSHP
OUTPUTS
C1
C2 - C4
C5
C6, C7
D0 - D9
OTHER
NC
: MASTER CLOCK
: CCD SIGNAL
: DUMMY BIT CLAMP PULSE
: OPTICAL BLACK CLAMP PULSE
: PREBLANKING
: CPU CLOCK FOR SERIAL INTERFACE
: CPU DATA FOR SERIAL INTERFACE
: CPU STROBE FOR SERIAL INTERFACE
: RESET (H: NORMAL L: RESET)
: CCD SIGNAL DATA LEVEL SAMPLING PULSE
: CCD SIGNAL PRECHARGE LEVEL
SAMPLING PULSE
: OPTICAL BLACK CLAMP CIRCUIT REFERENCE
: INTERNAL REFERENCE
: A/D CONVERTER COMMON MODE VOLTAGE
: A/D CONVERTER VOLTAGE REFERENCE
: A/D CONVERTER
: NO CONNECTION
ADCK
XSHD
XSHP
CLPDM
XCS
SI
SCK
3 - 12
19
16
22
21
23
46
47
48
CCDIN
30
C2 - C7
29,
31, 32,
37 - 39
28
D0 - D9
PBLK
OUTPUT
LATCH
ANALOG
TO
DIGITAL
CONVERTER
PROGRAMMABLE
GAIN
AMPLIFIER
(PGA)
_6 dB
TO
+42 dB
CORRELATED
DOUBLE
SAMPLING
(CDS)
SERIAL
INTERFACE
TIMING
CONTROL
INPUT
CLAMP
REFERENCE
VOLTAGE
GENERATOR
C1
20
CLPOB
OPTICAL
BLACK
CLAMP
PREBLANKING
6
10
IC