Sony STR-DH730 - IC Block Diagrams; IC2006 PCM9211 PTR Diagram (Digital Board)

STR-DH730/DH830
46
• IC Block Diagrams
IC2006 PCM9211PTR (DIGITAL BOARD (3/4))
20
19
18
17
14
13
12
11
10
9
8
7
6
5
4
3
2
1
48
47
46
45
44
43
42
41
40
39
16
15
22
21
38
37
36
35
34
33
32
31
30
29
26
25 24
23
28
27
SCKO
MAIN
OUTPUT
PORT
AUTO
RXIN7
DOUT
SCKO/BCK/LRCK
DIR
DIR
PLL
AUXIN0
RXIN0
RXIN1
RXIN2
RXIN3
RXIN4
RXIN5
RXIN6
RXIN7
RXIN8
RXIN9
RXIN10
RXIN11
DITOUT
ADC
Com Supply
MPIO_C
SELECTOR
AUXIN1
ADC Clock
(SCK/BCK/LRCK)
XMCKO
(To MPIO_A & MPO0/1)
REGISTER
Function
Control
GPIO/GPO
Data
DIT CS
(48-bit)
DIR Interrupt
ALL
DIR
ANALOG
DIR
ANALOG
ADC
ANALOG
POWER SUPPLY
Reset
and Mode
Set
SPI/I
2
C
INTERFACE
DIR
f
s
Calculator
All Port
f
s
Calculator
DIR CS
(48-bit)
DIR
P
c
and P
o
ADC Stand alone
ADC
RECOUT0
RECOUT1
Lock:DIR
Unlock:ADC
Lock Detection
ADC
AUXIN0
AUXIN1
AUXIN2
AUTO
DIR
ADC
AUXIN0
AUXIN1
AUXIN2
RECOUT1
DITOUT
AUXOUT
AUTO
DIR
ADC
AUXIN0
AUXIN1
MPIO_B
MPIO_C
MPO0
MPO1
MPIO_A
SBCK/SLRCK
(to MPIO_A)
AUXIN 2
RECOUT0
MPO0/1
SELECTOR
MPIO_B
SELECTOR
Secondary BCK/LRCK
Divider
Selector
EXTRA DIR FUNCTIONS
ERROR DETECTION
Non-PCM DETECTION
f
s
Calculator
Flags
DTS-CD/LD Detection
Validity Flag
User Data
Channel Status Data
BFRAME Detection
Interrupt System
BCK
LRCK
DOUT
MPO1
MPO0
MPIO_B3
MPIO_B2
MPIO_B1
MPIO_B0
MPIO_C3
MPIO_C2
MPIO_C1
MPIO_C0
MPIO_A3
MPIO_A2
MPIO_A1
MPIO_A0
NPCM/INT1
ERROR/INT0
VINR
VINL
VCCAD
A
GNDAD
VCOM
FILT
VCC
AGND
XTO
XTI
GNDRX
RXIN0
VDDRX
RXIN1
RST
RXIN2
RXIN3
RXIN4/ASCKIO
RXIN5/ABCKIO RXIN6/ALRCKIO
RXIN7/ADINO
MODE MS/ADR1 MC/SCL MDI/SDA
MDO/ADR0
DVDD
DGND
ADC Mode
Control
OSC
Divider
XMCKO
Divider
DIT
Clock/Data
Recovery
MPIO_A
SELECTOR