Limitations:
On the STM32H7B3I-DK board, some SDIO1 signals are shared with some digital camera interface DCMI
signals. As a consequence, the user must pay attention that there is no camera connected to CN7 when using the
microSD
™
card.
8.6.5 Audio
An audio codec CS42L51-CNZ is connected to either I2S6 or SAI1 interface of STM32H7B3LIH6QU to support
the TDM feature. I2S6 interface is used by default.
This feature is able to implement audio recording on analog Microphone and audio playback of different audio
stream on headphones and lineout at the same time.
The audio codec communicates with STM32H7B3LIH6QU via the I2C4 bus, which is shared with the camera
module, the TFT-LCD, the ARDUINO
®
Uno connectors, the STMod+ connector, and the Wi‑Fi
®
module. The I²C-
bus addresses of the CS42L51- CNZ codec are 0x95 and 0x94.
Several audio connections are available on the STM32H7B3I-DK board:
• An analog microphone input which is connected to ADC of CS42L51- CNZ through the blue audio jack CN6
• An external speaker which can be connected to CS42L51-CNZ via green audio jack CN5
• A CN3 connector offers the possibility to connect a microphone module with up to five ST-MEMS
microphones. They are connected to the digital input microphones of STM32H7B3LIH6QU and are
managed by the DFSDM interface.
Note: When using the I2S6 interface, make sure that SB46 (I2S6_MCK) and SB31 (I2S6_WS) are ON.
8.6.6 FD-CAN
The STM32H7B3I-DK board supports one channel of FD-CAN (Flexible Data Rate CAN) compliant bus based on
3V3 CAN transceiver.
Standby signal on the FD-CAN transceiver is controlled by PH8 GPIO of STM32H7B3LIH6QU.
Limitations:
FD-CAN signals are shared with STMod+ signals. As a consequence, the user must take care that nothing is
connected to STMod+ connector (1, 4 pins), or SB7 and SB12 must be OFF when the FD-CAN1 bus is activated.
Table 9. FD-CAN1 – Solder bridge configuration
Solder bridge
Setting
(1)
Configuration
SB3, SB4, SB5
SB3, SB4, SB5 ON
TXD, RXD, and STBY of MCD2562FD are connected to PA11
(FDCAN1_RX), PA12 (FDCAN1_TX) and PH8 (GPIO) of
STM32H7B3LIH6QU MCU.
SB3, SB4, SB5 OFF
FDCAN1 bus not connected: TXD, RXD, and STBY of MCD2562FD are
not connected to PA11 (FDCAN1_RX), PA12 (FDCAN1_TX) and PH8
(GPIO) of STM32H7B3LIH6QU MCU.
1. The default configuration is shown in bold.
8.6.7 Octo-SPI NOR Flash memory
The STM32H7B3I-DK board includes a 512-Mbit Octo-SPI NOR Flash memory device (MX25LM51245GXDI00
from MACRONIX), which is connected to the OCTOSPI1 interface of the STM32H7B3LIH6QU microcontroller.
MX25LM51245GXDI00 operates in a single transfer rate (STR) or a double transfer rate (DTR) mode. The
RESETn of the Flash memory is connected to the general reset (NRST) of the STM32H7B3I-DK Discovery kit.
8.6.8 SDRAM memory
The STM32H7B3I-DK board adds an external 128-Mbit SDRAM (IS42S16800F- 6BLI), which is connected to
STM32H7B3LIH6QU flexible memory controller FMC interface.
UM2569
Board functions
UM2569 - Rev 1
page 21/54
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