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ST STM32L4 Series - Page 104

ST STM32L4 Series
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3.6.14 Extended interrupt and events controller (EXTI) ................................40
3.6.15 Cyclic redundancy-check calculation unit (CRC) ................................41
3.6.16 Flexible static memory controller (FSMC) .....................................42
3.6.17 Quad-SPI interface and Octo-SPI interface (QUADSPI/OCTOSPI)..................44
3.6.18 Analog-to-digital converter (ADC) ...........................................45
3.6.19 Digital-to-analog converter (DAC) ...........................................48
3.6.20 Voltage reference buffer (VREFBUF) ........................................49
3.6.21 Comparator (COMP) .....................................................49
3.6.22 Operational amplifiers (OPAMP) ............................................52
3.6.23 Digital filter for sigma delta modulators (DFSDM) ...............................52
3.6.24 Digital camera interface (DCMI) ............................................54
3.6.25 LCD-TFT display controller (LTDC) ..........................................55
3.6.26 DSI Host (DSI) .........................................................56
3.6.27 Touch sensing controller (TSC) .............................................57
3.6.28 HASH processor (HASH) .................................................58
3.6.29 True random number generator (RNG) .......................................59
3.6.30 Advanced encryption standard hardware accelerator (AES) .......................60
3.6.31 Advanced, general, and low-power timer (TIM1/2/3/4/5/8/15/16/17 LPTIM1/2) .........61
3.6.32 Basic timers (TIM6/7) ....................................................64
3.6.33 Real-time clock module (RTC) .............................................65
3.6.34 Inter-integrated circuit (I2C)................................................67
3.6.35 Universal synchronous/asynchronous receiver/transmitter and low power universal
asychronous receiver/transmitter (USART1/2/3/4/5/6/7/8 and LPUART)..............69
3.6.36 Serial peripheral interface (SPI) ............................................72
3.6.37 Serial audio interface (SAI) ................................................74
3.6.38 Single Wire Protocol Master Interface (SWPMI) ................................75
3.6.39 SD/SDIO/MMC card host interface (SDMMC) ..................................77
3.6.40 Controller area network (bxCAN) ...........................................79
3.6.41 Universal serial bus full-speed device interface (OTG_FS) ........................80
3.6.42 Part separation (no interference)............................................82
3.7 Conditions of use..............................................................83
4 Safety results.....................................................................91
4.1 Random hardware failure safety results ...........................................91
UM2305
Contents
UM2305 - Rev 10
page 104/110

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