Supermicro x10qbi - Fan Headers, Chassis Intrusion, and Buzzer

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X10QBi Platform User's Manual
X10QBi
Rev:1.01B
MAC CODE
BAR CODE
M*M*M*M*M*M*
FAN5
FAN10
FAN7 FAN6
FAN8
FAN9
FAN1
FAN4
FAN2
FAN3
JPW2
JPW3
LED_PORT80
JM2
JM5
JLPC1
JP2
BT2
SP1
JP3
JL1
J17
JOH1
JI2C2
LED28
LED23
LED2
LED1
LED15
LED19
LED22
LED18
JBT1
LED35
LED10
LED9
LED8
LED14
LED7
LED12
LED13
LED11
LEDIO1
LED3
JSD1
JP1JP5
JPME2
JPME1
JWD1
JPT1
JWP1
JXDP3
JXDP2
JVRM_I2C1
JVRM_I2C2
JXDP1
JIPMB1
JPI2C1
JD1
T-SGPIO1
T-SGPIO2
I-SATA0
I-SATA1
I-SATA2
I-SATA5
I-SATA4
I-SATA3
JF1
JIO1
SMI SLOT P4M1
SMI SLOT P3M2
SMI SLOT P3M1
SMI SLOT P2M2
SMI SLOT P2M1
SMI SLOT P1M2
SMI SLOT P4M2
SMI SLOT P1M1
CPU4
CPU3
CPU1
USB2/3
USB4
COM1
CPU4 SLOT8 PCI-E 3.0 X8
CPU4 SLOT10 PCI-E 3.0 X8
CPU4 SLOT11 PCI-E 3.0 X16
CPU3 SLOT7 PCI-E 3.0 X8
CPU3 SLOT6 PCI-E 3.0 X8
CPU3 SLOT9 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X8 CPU2 SLOT3 PCI-E 3.0 X8
CPU1 SLOT2 PCI-E 3.0 X16
CPU1 SLOT1 PCI-E 3.0 X8
SIO SLOT
CLOSE 1st
OPEN 1st
CPU2
USB0/1
JI2C1
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
M*
M*
M* M*
M*
M*
M*
M*
MAC CODE
JPW1
CPU2 SLOT4 PCI-E 3.0 X16
USB5
JVRMCPU1
A
4
JVRMCPU2
JVRMCPU3
JVRMCPU4
1
JPW4
JPW5
JPW6
JPW7
Chassis Intrusion
A Chassis Intrusion header is located
at JL1 on the system board. Attach an
appropriate cable from the chassis to be
informed of possible chassis intrusion
when the chassis is opened.
Chassis Intrusion
Pin Denitions
Pin# Denition
1 Intrusion Input
2 Ground
C
A. Fan1
B. Fan2
C. Fan3
D. Fan4
E. Fan5
F. Fan6
G. Fan7
H. Fan8
I. Fan9
J. Fan 10
K Chassis Intrusion
D
E
F
Fan Headers
The X10QBi system board has ten sys-
tem fan headers and ten CPU_card fan
headers. All these are 4-pin fans and are
backward_compatible with the traditional
3-pin fan. Fan speed control is available
via IPMI interface for 4-pin fans only.
See the tables on the right for more
information.
Fan Header
Pin Denitions
Pin# Denition
1 Ground
2 +12V
3 Tachometer
4 PWR Modulation (4-pin fans only)
G
A
B
I
H
J
K