Supermicro X11DPL-i - Page 79

Chapter 4: UEFI BIOS
79
Enhanced Halt State (C1E)
Select Enabled to use Enhanced Halt-State technology, which will signicantly reduce
the CPU's power consumption by reducing the CPU's clock cycle and voltage during a
Halt-state. The options are Disable and Enable.
Package C State Control (Available when "Power Technology" is set to
Custom)
Package C State
This feature allows the user to set the limit on the C State package register. The options
are C0/C1 State, C2 State, C6 (Non Retention) State, C6 (Retention) state, No Limit,
and Auto.
CPU T State Control
Software Controlled T-States
If this feature is set to Enable, CPU throttling settings will be supported by the software
of the system. The options are Disable and Enable.
Chipset Conguration
Warning: Setting the wrong values in the following features may cause the system to
malfunction.
North Bridge
This feature allows users to congure the following North Bridge settings.
UPI Conguration
UPI Conguration
The following UPI information will display:
• Number of CPU
• Number of Active UPI Link
• Current UPI Link Speed
• Current UPI Link Frequency
• UPI Global MMIO Low Base / Limit
• UPI Global MMIO High Base / Limit
• UPI Pci-e Congguration Base / Size