Tektronix 2430 - Page 7

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6-1 Relative Susceptibility to Static-Discharge Damage................................................................ 6-3
6-2 External Inspection Check List................................................................................................. 6-5
6-3 Internal Inspection Check List 6-6
6-4 Power Supply Voltage and Ripple Limits 6-10
6-5 Maintenance Aids 6-13
6-6 2430 Troubleshooting Procedures...................................................................................... 6-35
6-7 Video Option Troubleshooting 6-99
6-8 INIT PANEL States 6-103
4-8
4-17
4-19
4-2
3-57
3-59
3-19
3-20
3-21
3-25
3-50
3-52
3-53
2-2
Page
1-3
1-15
1-17
1-18
2430 Service
Test Equipment Required .
Accuracy Limits CH 1 and CH 2 CURSOR VOLTS Readout and A and
B TRIGGER LEVEL Readouts .
Minimum Display Level for CH 1 or CH 2 Triggering .
Minimum Signal Level for EXT1 or EXT2 Triggering .
Host Memory-Mapped 1/0 .
Processor Control Register Functions .
Processor Miscellaneous Register (PMREG)Output Functions .
Waveform I-LPAddress Decoding .
Trigger Logic Array Addresses (6080h-6087h) .
REF4/5 Frequency for Each SEC/DIV Setting .
Phase Clock Array Control Lines (CC3 through CCO) .
Holdoff Delay Range for Current Source vs Charging Capacitor
Combinations .
Side Board Address Decoding .
Voltage, Fuse, and Power-Cord Data .
Electrical Characteristics .
Environmental Characteristics .
Mechanical Characteristics .
Option 05 (TV Trigger) Electrical Characteristics .
LIST OF TABLES
4-3
4-4
4-1
4-2
3-9
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
2-1
Table
1-1
1-2
1-3
1-4