Tektronix 2430 - Page 81

3-47
Figure 3-5. Simplified CCO architecture.
4917- 05
SIGNAL INPUT 1-
SIGNAL INPUT
1+
E
t
REGISTER REG IS TER
(1 6 lONG)
SA M PLE ClK
rs: )
B
REGIS TER
(33
lONG)
\.
1 "-
-
- -
--
- --
--
-
I',-
- - -
--
-
--- -
- ------- -
k
-
-
---
---
- -
--
- - -
-
-
- -
-
I,
,
-
-
- - -
---
- -
--
- -
-
- -
-
-
-
1
A REG IS TER
(16 lO N G)
I "
r
OUTP UT WEl l
-
-
- -
------------
- -
-
-
~
SOUR CE
,
-
-
-
- -
- --
-
-- -
I
-
- --
-
- -
-
FOllOWER
1" -
-
--
-
-
-- -
-
- -
-
- - --
-
-
1--
-- _j
~ OUTPU T
,
1 +
,
-
- -
---
-
- - - -
--
-
---
-
- -
TI TR AN SFE R
ClK
~ET ClK
TO TRANS FER
ClK
-
A RE G IST E R C lKS
4
001
B R EG ISTER ClKS
4
-
C
REG ISTER
Cl KS
4
-
~ OU T P UT
1-
~
-
0::
(.J
W 0::
Z
f- W
(.J
0
en f-
z
_j
-
en
0
FOll OWER
(.J
-
_j
(D
w
(.J
-
0:: W
(D
-
0::
-
-
Z
f-
0::
-
=>
0::
OUTPU T
w
0
ui
WE l l
f-
0::
f-
en
w
0::
en
-
LL
W
-
(.J
en
LL
(.J
W
Z
en
w
0::
-c
z
0::
0::
-c
u
-c
f-
0::
f-
SAMPLE ClK
rs: )
T
B REG I STER
(33
lONG)
C R G IST E R
TRANSF E R OUT
TRAN SFER IN
FAS T-I N SLOW -OU T
(FI SO) PAT H
SHORT-P IPE
PATH
Theory of Operation-2430 Service