Telit Wireless Solutions LE910C1-AP Hw Design Guide

LE910Cx mPCIe Hardware Design Guide
1VV0301510 Rev. 13 Page 45 of 73 2021-07-07
Not Subject to NDA
Pin
Signal
I/O
Function
Type
Comment
45
PCM_CLK I/O
Digital Audio Interface
(CLK)
B-PD 1.8V PCM_CLK
16
REF_CLK
O
Audio Master Clock
B-PD 1.8V
I2S_MCLK
Table 21: Digital Audio Interface (DVI) Signals
LE910Cx-mPCIe DVI has the following characteristics:
• PCM Master mode or Slave mode using short or long frame sync modes
• 16 bit linear PCM format
• PCM clock rates of 256 kHz, 512 kHz, 1024 kHz and 2048 kHz (Default)
• Frame size of 8, 16, 32, 64, 128 & 256 bits per frame
• Sample rates of 8 kHz and 16 kHz
In addition to the DVI port, the LE910Cx-mPCIe module provides a master clock signal
(REF_CLK on Pin 16) which can either provide a reference clock to an external codec or
form an I2S interface together with the DVI port where the REF_CLK acts as the
I2S_MCLK.
The REF_CLK default frequency is 12.288 MHz.
When using the DVI with REF_CLK as an I2S interface, 12.288 MHz is 256 x fs (where fs =
48 kHz).
For timing diagrams refer to LE910Cx module Hardware Design Guide at Section 1.5
Related Documents
SIM Interface
The SIM pins provide the connections necessary to interface to a SIM socket located on
the host device. The Voltage levels over this interface comply with 3GPP standards. SIMIN
line terminated to GND internally for standard LE910Cx-mPCIe variant without either SIM
holder or onboard eSIM.

Telit Wireless Solutions LE910C1-AP Specifications

General

Brand	Telit Wireless Solutions
Model	LE910C1-AP
Category	Control Unit
Language	English