GPMC_FCLK
gpmc_csn[x]
gpmc_be0n_cle
gpmc_advn_ale
gpmc_oen
gpmc_wen
DATA
GNF0
GNF1
GNF4
GNF9
GNF3
GNF6
gpmc_ad[15:0]
GPMC_FCLK
gpmc_csn[x]
gpmc_be0n_cle
gpmc_advn_ale
gpmc_oen
gpmc_wait[x]
DATA
GNF10
GNF14
GNF15
GNF12
GNF13
gpmc_ad[15:0]
AM3359, AM3358, AM3357, AM3356, AM3354, AM3352
SPRS717H –OCTOBER 2011–REVISED MAY 2015
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(1) GNF12 parameter illustrates amount of time required to internally sample input data. It is expressed in number of GPMC functional
clock cycles. From start of read cycle and after GNF12 functional clock cycles, input data will be internally sampled by active
functional clock edge. GNF12 value must be stored inside AccessTime register bits field.
(2) GPMC_FCLK is an internal clock (GPMC functional clock) not provided externally.
(3) In gpmc_csn[x], x is equal to 0, 1, 2, 3, 4, or 5. In gpmc_wait[x], x is equal to 0 or 1.
Figure 7-30. GPMC and NAND Flash—Data Read Cycle
(1) In gpmc_csn[x], x is equal to 0, 1, 2, 3, 4, or 5.
Figure 7-31. GPMC and NAND Flash—Data Write Cycle
148 Peripheral Information and Timings Copyright © 2011–2015, Texas Instruments Incorporated
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