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SPRS698F –NOVEMBER 2010–REVISED MARCH 2016
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Detailed DescriptionCopyright © 2010–2016, Texas Instruments Incorporated
Table 6-62. eCAP Control and Status Registers
NAME eCAP1 eCAP2 eCAP3
SIZE
(×16)
EALLOW
PROTECTED
DESCRIPTION
TSCTR 0x6A00 0x6A20 0x6A40 2 No Time-Stamp Counter
CTRPHS 0x6A02 0x6A22 0x6A42 2 No Counter Phase Offset Value Register
CAP1 0x6A04 0x6A24 0x6A44 2 No Capture 1 Register
CAP2 0x6A06 0x6A26 0x6A46 2 No Capture 2 Register
CAP3 0x6A08 0x6A28 0x6A48 2 No Capture 3 Register
CAP4 0x6A0A 0x6A2A 0x6A4A 2 No Capture 4 Register
Reserved
0x6A0C –
0x6A12
0x6A2C –
0x6A32
0x6A4C –
0x6A52
8 No Reserved
ECCTL1 0x6A14 0x6A34 0x6A54 1 No Capture Control Register 1
ECCTL2 0x6A15 0x6A35 0x6A55 1 No Capture Control Register 2
ECEINT 0x6A16 0x6A36 0x6A56 1 No Capture Interrupt Enable Register
ECFLG 0x6A17 0x6A37 0x6A57 1 No Capture Interrupt Flag Register
ECCLR 0x6A18 0x6A38 0x6A58 1 No Capture Interrupt Clear Register
ECFRC 0x6A19 0x6A39 0x6A59 1 No Capture Interrupt Force Register
Reserved
0x6A1A –
0x6A1F
0x6A3A –
0x6A3F
0x6A5A –
0x6A5F
6 No Reserved
6.9.11.1 eCAP Electrical Data/Timing
Table 6-63 shows the eCAP timing requirement and Table 6-64 shows the eCAP switching characteristics.
(1) For an explanation of the input qualifier parameters, see Table 6-76.
Table 6-63. Enhanced Capture (eCAP) Timing Requirement
(1)
MIN MAX UNIT
t
w(CAP)
Capture input pulse width
Asynchronous 2t
c(SCO)
cyclesSynchronous 2t
c(SCO)
With input qualifier 1t
c(SCO)
+ t
w(IQSW)
Table 6-64. eCAP Switching Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER MIN MAX UNIT
t
w(APWM)
Pulse duration, APWMx output high/low 20 ns