Do you have a question about the Toradex Colibri and is the answer not in the manual?
Provides a general overview of the Colibri module's interfaces and design considerations.
Lists essential documents for carrier board design, including layout guides and datasheets.
Defines common abbreviations and acronyms used in the document.
Details the 10/100Mbit Ethernet port, center tap circuit, and Auto MDIX function.
Covers USB host/client modes, data signals, and control signals for carrier board design.
Describes Parallel RGB LCD, VGA, and LVDS interfaces, color mapping, and signal termination.
Details I2C, UART, SPI, and CAN interfaces, signals, and termination requirements.
Explains module power requirements, voltage ranges, and signal pin definitions.
Details UPG, SUS, RUN, RST states and the power-up sequence for carrier boards.
Discusses backfeeding causes, identification, and prevention methods for reliable operation.
Covers SO-DIMM socket compatibility, fixation methods, and fastener options.
Discusses heat dissipation, thermal throttling, and adding heat sinks for optimal performance.
Location and usage of JTAG test points for debugging and programming the SoC.
Provides a general overview of the Colibri module's interfaces and design considerations.
Lists essential documents for carrier board design, including layout guides and datasheets.
Defines common abbreviations and acronyms used in the document.
Details the 10/100Mbit Ethernet port, center tap circuit, and Auto MDIX function.
Covers USB host/client modes, data signals, and control signals for carrier board design.
Describes Parallel RGB LCD, VGA, and LVDS interfaces, color mapping, and signal termination.
Details I2C, UART, SPI, and CAN interfaces, signals, and termination requirements.
Explains module power requirements, voltage ranges, and signal pin definitions.
Details UPG, SUS, RUN, RST states and the power-up sequence for carrier boards.
Discusses backfeeding causes, identification, and prevention methods for reliable operation.
Covers SO-DIMM socket compatibility, fixation methods, and fastener options.
Discusses heat dissipation, thermal throttling, and adding heat sinks for optimal performance.
Location and usage of JTAG test points for debugging and programming the SoC.
| Operating Temperature | -40°C to +85°C |
|---|---|
| Ethernet | 10/100 Mbps |
| USB | USB 2.0 Host and OTG |
| CAN | Yes |
| Display | HDMI, LVDS, RGB |
| Serial Ports | UART |
| I2C | Yes |
| SPI | Yes |
| GPIO | Yes |
| Expansion Interfaces | GPIO, I2C, SPI |
| Processor | Depends on module (e.g., NXP i.MX6, i.MX7, NVIDIA Tegra) |
| Memory | Depends on module (e.g., 512MB to 1GB RAM) |