Toradex Colibri - Colibri JTAG Interface Access

Colibri Carrier Board Design Guide
Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com
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4.5 JTAG Test Pads
Figure 62: Location of JTAG Test Pads (bottom view, dimensions in mm)
The JTAG interface is not generally required for software development with the Colibri module.
There is always the possibility of reprogramming the module using the Recovery Mode over USB or
UART. However, for debugging the operating system, especially for real-time operating systems, it
might be beneficial having access to the JTAG interface of the SoC.
The JTAG interface is located on test points on the underside of the module. The location is the
same for all modules in the Colibri family. There are a total of six test pads, of which five are used
for the JTAG interface. The sixth test pad is used for module testing and should be left unconnected
on the carrier board. Please note the unusual pin numbering.
Pin
Number
Colibri
Signal Name
I/O
Type
Power
Rail
Description
1
JTAG_TDI
I
CMOS
1.8V/3.3V
Test Data In
2
JTAG_TDO
O
CMOS
1.8V/3.3V
Test Data Out
3
JTAG_TCK
I
CMOS
1.8V/3.3V
Test Clock
4
JTAG_TRST#
I
CMOS
1.8V/3.3V
Test Reset (optional)
5
JTAG_TMS
I
CMOS
1.8V/3.3V
Test Reset (optional)
6
Do not use this pin. The manufacturer uses the test pad for
module testing or programming.
Table 29: JTAG Signals
Please pay attention to the interface voltage. Depending on the module, the IO voltage can be
3.3V or 1.8V. It is crucial to use the correct JTAG interface voltage. Carefully read the module
datasheet for more information. On the Colibri Evaluation Board version 3.1 and later, there is a
jumper for setting the JTAG IO voltage (JP29).
5.08
38.50
4.20
2.54
Ø1.50
16 2
43 5
Bottom Side
2.54