Toradex Colibri - Page 5

Colibri Carrier Board Design Guide
Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com
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2.13 PWM ................................................................................................................................. 30
2.13.1 PWM Signals ....................................................................................................... 30
2.13.2 Reference Schematics ......................................................................................... 30
2.13.3 Unused PWM Signal Termination .......................................................................... 30
2.14 Analog Audio ..................................................................................................................... 31
2.14.1 Analog Audio Signals ........................................................................................... 31
2.14.2 Reference Schematics ......................................................................................... 31
2.14.3 Unused Analog Audio Signal Termination .............................................................. 32
2.15 Touch Panel Interface ........................................................................................................ 33
2.15.1 Resistive Touch Signals ....................................................................................... 33
2.15.2 Reference Schematics ......................................................................................... 33
2.15.3 Unused Touch Panel Interface Signal Termination ................................................. 33
2.16 Analog Inputs .................................................................................................................... 34
2.16.1 Analog Input Signals ............................................................................................ 34
2.16.2 Unused Analog Inputs Signal Termination ............................................................. 34
2.17 Parallel Memory Bus (External Memory Bus) ....................................................................... 34
2.17.1 Memory Bus Signals ............................................................................................ 34
2.17.2 Unused Memory Bus Signals Termination ............................................................. 36
2.18 GPIO ................................................................................................................................ 36
2.18.1 Preferred GPIO Signals ........................................................................................ 36
2.18.2 Unused GPIO Termination .................................................................................... 36
2.19 Module Recovery ............................................................................................................... 37
3 Power Management....................................................................................................... 38
3.1 Power Supply Design ......................................................................................................... 38
3.2 Power Signals ................................................................................................................... 38
3.2.1 Digital Supply Signals .............................................................................................. 38
3.2.2 Analog Supply Signals ............................................................................................. 38
3.2.3 Power Management Signals .................................................................................... 39
3.3 Power Block Diagram ......................................................................................................... 39
3.4 Power States ..................................................................................................................... 41
3.5 Power-Up Sequence .......................................................................................................... 41
3.6 Reference Schematics ....................................................................................................... 42
3.7 Backfeeding ...................................................................................................................... 44
3.7.1 Introduction ............................................................................................................. 44
3.7.2 What is Backfeeding ................................................................................................ 44
3.7.3 Potential Issues Caused by Backfeeding................................................................... 46
3.7.4 Identify Backfeeding Issues ...................................................................................... 47
3.7.5 Backfeeding Prevention ........................................................................................... 50
4 Mechanical and Thermal Consideration ........................................................................... 60
4.1 Module Connector.............................................................................................................. 60
4.2 Fixation of the Module ........................................................................................................ 60
4.3 Thermal Solution ................................................................................................................ 62
4.4 Module Size ...................................................................................................................... 62
4.5 JTAG Test Pads ................................................................................................................ 63
5 Appendix A – Physical Pin Definition and Location ............................................................ 64