EasyManua.ls Logo

VIPA CPU 312SC - Page 136

VIPA CPU 312SC
185 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Byte Bit 7...0
0
n Bit 0: set at module failure
n Bit 1: 0 (fix)
n Bit 2: set at external error
n Bit 3: set at channel error
n Bit 7 ... 4: 0 (fix)
1
n Bit 3 ... 0: Module class
0101b: Analog
1111b: Digital
n Bit 4: Channel information present
n Bit 7 ... 5: 0 (fix)
2 00h (fix)
3 00h (fix)
The record set 0 of the counter function, frequency meas-
urement and pulse width modulation has the same struc-
ture. There are differences in the structure of record set 1.
The record set 1 contains the 4byte of the record set 0 and addition-
ally 12byte module specific diagnostic data. The diagnostic bytes
have the following assignment:
Byte Bit 7...0
0 ... 3
Content record set 0
Ä
‘Record set 0 Diagnostic
incoming
on page 135
4
n Bit 6 ... 0: Channel type (here 70h)
70h: Digital input
71h: Analog input
72h: Digital output
73h: Analog output
74h: Analog input/output
n Bit 7: More channel types present
0: no
1: yes
5 Number of diagnostic bits per channel (here 08h)
6 Number of channels of a module (here 08h)
7
n Bit 0: Error in channel group 0 (I+0.0 ... I+0.3)
n Bit 1: Error in channel group 1 (I+0.4 ... I+0.7)
n Bit 2: Error in channel group 2 (I+1.0 ... I+1.1)
n Bit 3: reserved
n Bit 4: Error in channel group 4 (counter 0)
n Bit 5: Error in channel group 5 (counter 1)
n Bit 6: reserved
n Bit 7: reserved
Diagnostic record set 1
at counter function
VIPA System 300SDeployment I/O periphery
Diagnostic and interrupt > Diagnostic interrupt
HB140 | CPU-SC | 312-5BE13 | GB | 15-50 136

Table of Contents

Related product manuals