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VIPA CPU 312SC - Protocols and procedures

VIPA CPU 312SC
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The following picture shows the basic structure for programming a
receive command. This structure can be used for all protocols.
7.6 Protocols and procedures
The CPU supports the following protocols and procedures:
n ASCII communication
n STX/ETX
n 3964R
n USS
n Modbus
ASCII data communication is one of the simple forms of data
exchange. Incoming characters are transferred 1 to 1. At ASCII, with
every cycle the read FC/SFC is used to store the data that is in the
buffer at request time in a parameterized receive data block. If a tele-
gram is spread over various cycles, the data is overwritten. There is
no reception acknowledgement. The communication procedure has to
be controlled by the concerning user application. An according
Receive_ASCII FB may be found within the VIPA library in the service
area of www.vipa.com.
STX/ETX is a simple protocol with start and end ID, where STX
stands for Start of Text and ETX for End of Text.
Principles of program-
ming
Overview
ASCII
STX/ETX
VIPA System 300SDeployment PtP communication
Protocols and procedures
HB140 | CPU-SC | 312-5BE13 | GB | 15-50 154

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