AC701 Evaluation Board www.xilinx.com 45
UG952 (v1.3) April 7, 2015
Feature Descriptions
Table 1-19 lists the connections between the codec and the FPGA.
Table 1-19: FPGA to HDMI Codec Connections (ADV7511)
FPGA Pin (U1) Schematic Net Name I/O Standard
ADV7511 (U48)
Pin Pin Name
AA24 HDMI_R_D4 LVCMOS18 92 D4
Y25 HDMI_R_D5 LVCMOS18 91 D5
Y26 HDMI_R_D6 LVCMOS18 90 D6
V26 HDMI_R_D7 LVCMOS18 89 D7
W26 HDMI_R_D8 LVCMOS18 88 D8
W25 HDMI_R_D9 LVCMOS18 87 D9
W24 HDMI_R_D10 LVCMOS18 86 D10
U26 HDMI_R_D11 LVCMOS18 85 D11
U25 HDMI_R_D16 LVCMOS18 80 D16
V24 HDMI_R_D17 LVCMOS18 78 D17
U20 HDMI_R_D18 LVCMOS18 74 D18
W23 HDMI_R_D19 LVCMOS18 73 D19
W20 HDMI_R_D20 LVCMOS18 72 D20
U24 HDMI_R_D21 LVCMOS18 71 D21
Y20 HDMI_R_D22 LVCMOS18 70 D22
V23 HDMI_R_D23 LVCMOS18 69 D23
AA23 HDMI_R_D28 LVCMOS18 64 D28
AA25 HDMI_R_D29 LVCMOS18 63 D29
AB25 HDMI_R_D30 LVCMOS18 62 D30
AC24 HDMI_R_D31 LVCMOS18 61 D31
AB24 HDMI_R_D32 LVCMOS18 60 D32
Y22 HDMI_R_D33 LVCMOS18 59 D33
Y23 HDMI_R_D34 LVCMOS18 58 D34
V22 HDMI_R_D35 LVCMOS18 57 D35
AB26 HDMI_R_DE LVCMOS18 97 DE
Y21 HDMI_R_SPDIF LVCMOS18 10 SPDIF
V21 HDMI_R_CLK LVCMOS18 79 CLK
AC26 HDMI_R_VSYNC LVCMOS18 2 VSYNC
AA22 HDMI_R_HSYNC LVCMOS18 98 HSYNC
W21 HDMI_INT LVCMOS18 45 INT
T20 HDMI_SPDIF_OUT_LS LVCMOS18 46 SPDIF_OUT