Xilinx AC701 User Manual

AC701 Evaluation Board www.xilinx.com 75
UG952 (v1.3) April 7, 2015
Feature Descriptions
XADC Header
[Figure 1-2, callout 31]
7 series FPGAs provide an Analog Front End (XADC) block. The XADC block includes a
dual 12-bit, 1
MSPS Analog-to-Digital Convertor (ADC) and on-chip sensors. See 7 Series
FPGAs XADC Dual 12-Bit 1MSPS Analog-to-Digital Converter User Guide (UG480)
[Ref 10]
for details on the capabilities of the analog front end. Figure 1-47 shows the AC701 board
XADC support features.
The AC701 board supports both the internal FPGA sensor measurements and the external
measurement capabilities of the XADC. Internal measurements of the die temperature,
V
CCINT
, V
CCAUX
, and V
CCBRAM
are available. The AC701 board V
CCINT
and V
CCBRAM
are
provided by a common 1.0V supply.
Jumper J42 can be used to select either an external differential voltage reference
(XADC_VREF) or on-chip voltage reference (jumper J42 2–3) for the analog-to-digital
converter.
X-Ref Target - Figure 1-47
Figure 1-47: Header XADC_VREF Voltage Source Options
FPGA
U1
VAUX0N
VAUX0P
VAUX8N
VAUX8P
V
REF (1.25V)
V
REFN
VCCADC
GNDADC
V
N
V
P
DXP
DXN
UG952_c1_39_101612
100Ω
1 nF
100Ω
100Ω
1 nF
100Ω
To
Header
J49
Dual Use IO
(Analog/Digital)
100Ω
1 nF
100Ω
To
Header
J19
100 nF
XADC_AGND
REF3012
U35
OutIn
Gnd
J42
XADC_AGND
Internal
Reference
XADC_VREF to
XADC Header J19.11
10 μF
Ferrite Bead
100 nF
1 nF
Ferrite Bead
J10
J9
Star Grid
Connection
J54
XADC_VCC
XADC_VCC
XADC_AGND
GND
V
REFP
XADC_VREFP
ADP123
U10
Out
In
Gnd
XADC_AGND
10 μF
XADC_VCC Header J49
100 nF
XADC_AGND
XADC_VCC
J43
Ferrite Bead
VCCAUX
VCC5V0
10 μF
XADC_VCC5V0 to
XADC Header J19.13
1.8V 150 mV max
J53
Filter 5V Supply
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Xilinx AC701 Specifications

General

Brand	Xilinx
Model	AC701
Category	Motherboard
Language	English