Xilinx KCU105 User Manual

KCU105 Board User Guide www.xilinx.com 40
UG917 (v1.4) September 25, 2015
Chapter 1: KCU105 Evaluation Board Features
Tab le 1- 10 lists the GTH bank 226 interface connections between FPGA U1, FMC LPC
connector J2, SFP0 connector P5, SFP1 connector P4 and MGT TX SMA connectors J29/J28,
MGT RX SMA connectors J31/J30 and MGT REFCLK SMA connectors J33/J32.
Table 1-10: KCU105 Board FPGA U1 GTH Bank 226 Connections
Transceiver
Bank
FPGA
(U1)
Pin
FPGA (U1) Pin Name Schematic Net Name
Connected
Pin
Connected Pin
Name
Connected
Device
GTH Bank
226
AA4 MGTHTXP0_226 FMC_LPC_DP0_C2M_P C2 DP0_C2M_P
FMC LPC
J2
AA3 MGTHTXN0_226 FMC_LPC_DP0_C2M_N C3 DP0_C2M_N
Y2 MGTHRXP0_226 FMC_LPC_DP0_M2C_P C6 DP0_M2C_P
Y1 MGTHRXN0_226 FMC_LPC_DP0_M2C_N C7 DP0_M2C_N
W4 MGTHTXP1_226 SFP1_TX_P 18 TD_P
SFP1 P4
W3 MGTHTXN1_226 SFP1_TX_N 19 TD_N
V2 MGTHRXP1_226 SFP1_RX_P 13 RD_P
V1 MGTHRXN1_226 SFP1_RX_N 12 RD_N
U4 MGTHTXP2_226 SFP0_TX_P 18 TD_P
SFP0 P5
U3 MGTHTXN2_226 SFP0_TX_N 19 TD_N
T2 MGTHRXP2_226 SFP0_RX_P 13 RD_P
T1 MGTHRXN2_226 SFP0_RX_N 12 RD_N
R4 MGTHTXP3_226 SMA_MGT_TX_P 1 SIG SMA J29
R3 MGTHTXN3_226 SMA_MGT_TX_N 1 SIG SMA J28
P2 MGTHRXP3_226 SMA_MGT_RX_C_P 1 SIG SMA J31
P1 MGTHRXN3_226 SMA_MGT_RX_C_N 1 SIG SMA J30
V6 MGTREFCLK0P_226 SMA_MGT_REFCLK_C_P 1 SIG SMA J33
V5 MGTREFCLK0N_226 SMA_MGT_REFCLK_C_N 1 SIG SMA J32
T6 MGTREFCLK1P_226 FMC_LPC_GBTCLK0_M2C_C_P D4 GBTCLK0_M2C_P
FMC LPC
J2
T5 MGTREFCLK1N_226 FMC_LPC_GBTCLK0_M2C_C_N D5 GBTCLK0_M2C_N
Send Feedback

Xilinx KCU105 Specifications

General

Brand	Xilinx
Model	KCU105
Category	Motherboard
Language	English